MachO Writer. This will change with the arrival of ObjectCodeEmitter and
BinaryObject

llvm-svn: 72906

a few lines later on.

llvm-svn: 72904

`-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a
lot of function, and then they would be `0'. The linker (at least on Darwin)
needs to encode the stack size. In some cases, the stack size is too large to
directly encode. So the linker checks to see if there is a "subl $xxx,%esp"
instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If
so, the compact encoding records the offset in the function to where the stack
size is embedded. But because the `DW_CFA_advance_loc' instructions are missing,
it looks before the function and dies.

So, instead of emitting the EH debug label before the stack adjustment
operations, emit it afterwards, right before the frame move stuff.

llvm-svn: 72898

integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt

llvm-svn: 72897

Update code generator to use this attribute and remove DisableRedZone target option.
Update llc to set this attribute when -disable-red-zone command line option is used.

llvm-svn: 72894

using Promote which won't work because i64 isn't
a legal type.  It's easy enough to use Custom, but
then we have the problem that when the type
legalizer is promoting FP_TO_UINT->i16, it has no
way of telling it should prefer FP_TO_SINT->i32
to FP_TO_UINT->i32.  I have uncomfortably hacked
this by making the type legalizer choose FP_TO_SINT
when both are Custom.
This fixes several regressions in the testsuite.

llvm-svn: 72891

RALinScan::attemptTrivialCoalescing() was returning a virtual register instead of the physical register it is allocated to. This resulted in virtual register(s) being added the live-in sets.

llvm-svn: 72890

A value defined by an implicit_def can be liven to a use BB. This is unfortunate. But register allocator still has to add it to the live-in set of the use BB.

llvm-svn: 72889

llvm-svn: 72880

instcombine doesn't know when it's safe. To partially compensate
for this, introduce new code to do this transformation in
dagcombine, which can use UnsafeFPMath.

llvm-svn: 72872

llvm-svn: 72870

llvm-svn: 72866

llvm-svn: 72861

llvm-svn: 72858

llvm-svn: 72854

the code tried to use "push", which doesn't exist for XMM registers.)

llvm-svn: 72836

llvm-svn: 72830

llvm-svn: 72828

Re-apply 72756 with fixes. One of those was introduced by we changed MachineInstrBuilder::addReg() interface.

llvm-svn: 72826

llvm-svn: 72825

llvm-svn: 72821

llvm-svn: 72817

llvm-svn: 72808

For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.

I view this as a temporary workaround until the assembler / linker changes.

llvm-svn: 72806

carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This
eliminates the need for them to search through the
MachineRegisterInfo livein list in order to identify these
virtual registers. EmitLiveInCopies is now the only user of the
virtual register portion of MachineRegisterInfo's livein data.

llvm-svn: 72802

with an accessor method which simply casts the parent class
SelectionDAGISel's TM to the target-specific type.

llvm-svn: 72801

be simplified to a loop-invariant value. This fixes PR4315.

llvm-svn: 72798

that puts a new warning in).

llvm-svn: 72797

llvm-svn: 72785

llvm-svn: 72783

llvm-svn: 72782

Emit file directives correctly in case of a .bc is generated by llvm-ld after linking in several .bc files.

llvm-svn: 72781

Expand it exactly like GlobalAddress.
Fix some more crashes (InsertBranch() not being implemented) for compiling hitec libs.

llvm-svn: 72776

llvm-svn: 72775

llvm-svn: 72771

this function" when using a not-too-smart compiler.

llvm-svn: 72768

llvm-svn: 72767

Fix for PR4225: When rewriter reuse a value in a physical register , it clear the register kill operand marker and its kill ops information. However, the cleared operand may be a def of a super-register. Clear the kill ops info for the super-register's sub-registers as well.

llvm-svn: 72758

llvm-svn: 72757

llvm-svn: 72756