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    • Evan Cheng's avatar
      Joining a live interval of a physical register with a virtual one can turn out · 7b2a0016
      Evan Cheng authored
      to be really bad. Once they are joined they are not broken apart. Also, physical
      intervals cannot be spilled!
      
      Added a heuristic as a workaround for this. Be careful coalescing with a
      physical register if the virtual register uses are "far". Check if there are
      uses in the same loop as the source (copy instruction). Check if it is in the
      loop preheader, etc.
      
      llvm-svn: 35134
      7b2a0016
  10. Mar 15, 2007
  11. Mar 03, 2007
    • Evan Cheng's avatar
      Watch out for cases like this: · 3fd72859
      Evan Cheng authored
      entry (0x8b056f0, LLVM BB @0x8b01b30, ID#0):
      Live Ins: %r0 %r1 %r2 %r3
              %reg1032 = tMOVrr %r3<kill>
              %reg1033 = tMOVri8 1
              %reg1034 = tMOVri8 0
              tCMPi8 %reg1029<kill>, 0
              tBcc mbb<entry,0x8b06a10>, 0
          Successors according to CFG: 0x8b06980 0x8b06a10
      
      entry (0x8b06980, LLVM BB @0x8b01b30, ID#12):
          Predecessors according to CFG: 0x8b056f0
              %reg1036 = tMOVrr %reg1034<kill>
          Successors according to CFG: 0x8b06a10
      
      entry (0x8b06a10, LLVM BB @0x8b01b30, ID#13):
          Predecessors according to CFG: 0x8b056f0 0x8b06980
              %reg1024<dead> = tMOVrr %reg1030<kill>
              ...
      
      reg1030 and r1 have already been joined. When reg1024 and reg1030 are joined,
      r1 live range from function entry to the tMOVrr instruction are dead. Eliminate
      r1 from the livein set of the entry BB, not the BB where the copy is.
      
      llvm-svn: 34866
      3fd72859
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