Now that the profitable bits of EnableFullLoadPRE have been enabled by default, rip out the remainder.
Anyone interested in more general PRE would be better served by implementing it separately, to get real
anticipation calculation, etc.

llvm-svn: 115337

Per Cortex-A9 pipeline diagram. AGU (core load / store issue) and NEON/FP issue are multiplexed. Model it correctly.

llvm-svn: 115332

llvm-svn: 115326

llvm-svn: 115325

Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.

llvm-svn: 115323

llvm-svn: 115314

llvm-svn: 115311

llvm-svn: 115310

llvm-svn: 115309

llvm-svn: 115308

llvm-svn: 115307

Also remove some code that died in the process.
One now non-existant ori is checked for.

llvm-svn: 115306

memcpy alignment is the minimum of the incoming alignments.

Fixes PR 8266.

llvm-svn: 115305

llvm-svn: 115304

llvm-svn: 115303

llvm-svn: 115300

llvm-svn: 115297

llvm-svn: 115296

llvm-svn: 115295

llvm-svn: 115294

llvm-svn: 115293

llvm-svn: 115292

maybe even Linux.

llvm-svn: 115291

llvm-svn: 115261

llvm-svn: 115257

llvm-svn: 115255

llvm-svn: 115251

llvm-svn: 115250

SingleSource/Regression/C/casts.c.

llvm-svn: 115246

The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.

llvm-svn: 115243

false positive, at least on Darwin. I haven't filed this, but you can feel free.

llvm-svn: 115242

conversion heuristics to the old-style ones.

llvm-svn: 115239

use MC instructions in the printInstruction() method via the tablegen flag
for it rather than a #define prior to including the autogenerated bits.

llvm-svn: 115238

llvm-svn: 115225

llvm-svn: 115215

llvm-svn: 115214

llvm-svn: 115206

We do want to allow LoadPRE to perform LICM-like transformations: we already consider PHI nodes to be negligible for
code size (making this transform code size neutral), and it allows us to hoist values out of loops, which is always
a good thing.

llvm-svn: 115205

The bug that broke i386 linux has been fixed in r115191.

llvm-svn: 115204

llvm-svn: 115203