prints:

getelementptr (int* %A, int -1)

as: "(A) - 4" instead of "(A) + 18446744073709551612", which makes the
assembler much happier.

This fixes test/Regression/CodeGen/X86/2005-02-14-IllegalAssembler.ll,
and Benchmarks/Prolangs-C/cdecl with LLC on X86.

llvm-svn: 20183

targets.

llvm-svn: 20030

llvm-svn: 20026

llvm-svn: 19986

llvm-svn: 19969

llvm-svn: 19930

llvm-svn: 19924

llvm-svn: 19880

truncated, e.g. (truncate:i8 something:i16) on a 32 or 64-bit RISC.

llvm-svn: 19879

llvm-svn: 19878

legalized, and actually return the correct result when we legalize the chain first.

llvm-svn: 19866

llvm-svn: 19797

registers.  This information is computed directly by the register allocator
now.

llvm-svn: 19795

llvm-svn: 19793

llvm-svn: 19792

llvm-svn: 19791

llvm-svn: 19789

llvm-svn: 19787

The first half of correct chain insertion for libcalls. This is not enough
to fix Fhourstones yet though.

llvm-svn: 19781

the new TLI that is available.

Implement support for handling out of range shifts.  This allows us to
compile this code (a 64-bit rotate):

unsigned long long f3(unsigned long long x) {
  return (x << 32) | (x >> (64-32));
}

into this:

f3:
        mov %EDX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%ESP + 8]
        ret

GCC produces this:

$ gcc t.c -masm=intel -O3 -S -o - -fomit-frame-pointer
..
f3:
        push    %ebx
        mov     %ebx, DWORD PTR [%esp+12]
        mov     %ecx, DWORD PTR [%esp+8]
        mov     %eax, %ebx
        mov     %edx, %ecx
        pop     %ebx
        ret

The Simple ISEL produces (eww gross):

f3:
        sub %ESP, 4
        mov DWORD PTR [%ESP], %ESI
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %ECX, DWORD PTR [%ESP + 12]
        mov %EAX, 0
        mov %ESI, 0
        or %EAX, %ECX
        or %EDX, %ESI
        mov %ESI, DWORD PTR [%ESP]
        add %ESP, 4
        ret

llvm-svn: 19780

llvm-svn: 19779

llvm-svn: 19763

This fixes the return-address-not-being-saved problem in the Alpha backend.

llvm-svn: 19741

llvm-svn: 19739

llvm-svn: 19738

llvm-svn: 19737

llvm-svn: 19736

llvm-svn: 19735

llvm-svn: 19727

operations for 64-bit integers.

llvm-svn: 19724

llvm-svn: 19721

llvm-svn: 19715

llvm-svn: 19714

llvm-svn: 19712

llvm-svn: 19707

llvm-svn: 19704

llvm-svn: 19703

llvm-svn: 19701

independent of each other.

llvm-svn: 19700

llvm-svn: 19699