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  1. May 12, 2007
  2. May 04, 2007
  3. May 03, 2007
  4. May 02, 2007
  5. May 01, 2007
  6. Apr 24, 2007
  7. Apr 15, 2007
  8. Apr 13, 2007
    • Chris Lattner's avatar
      Now that codegen prepare isn't defeating me, I can finally fix what I set · efd3051d
      Chris Lattner authored
      out to do! :)
      
      This fixes a problem where LSR would insert a bunch of code into each MBB
      that uses a particular subexpression (e.g. IV+base+C).  The problem is that
      this code cannot be CSE'd back together if inserted into different blocks.
      
      This patch changes LSR to attempt to insert a single copy of this code and
      share it, allowing codegenprepare to duplicate the code if it can be sunk
      into various addressing modes.  On CodeGen/ARM/lsr-code-insertion.ll,
      for example, this gives us code like:
      
              add r8, r0, r5
              str r6, [r8, #+4]
      ..
              ble LBB1_4      @cond_next
      LBB1_3: @cond_true
              str r10, [r8, #+4]
      LBB1_4: @cond_next
      ...
      LBB1_5: @cond_true55
              ldr r6, LCPI1_1
              str r6, [r8, #+4]
      
      instead of:
      
              add r10, r0, r6
              str r8, [r10, #+4]
      ...
              ble LBB1_4      @cond_next
      LBB1_3: @cond_true
              add r8, r0, r6
              str r10, [r8, #+4]
      LBB1_4: @cond_next
      ...
      LBB1_5: @cond_true55
              add r8, r0, r6
              ldr r10, LCPI1_1
              str r10, [r8, #+4]
      
      Besides being smaller and more efficient, this makes it immediately
      obvious that it is profitable to predicate LBB1_3 now :)
      
      llvm-svn: 35972
      efd3051d
  9. Apr 10, 2007
  10. Apr 07, 2007
  11. Apr 03, 2007
  12. Apr 02, 2007
  13. Mar 26, 2007
  14. Mar 20, 2007
  15. Mar 13, 2007
  16. Mar 09, 2007
  17. Mar 06, 2007
  18. Mar 03, 2007
  19. Mar 02, 2007
  20. Feb 10, 2007
  21. Feb 06, 2007
  22. Jan 15, 2007
  23. Jan 08, 2007
    • Reid Spencer's avatar
      For PR1097: · bf96e02a
      Reid Spencer authored
      Enable complex addressing modes on 64-bit platforms involving two induction
      variables by keeping a size and scale in 64-bits not 32.
      Patch by Dan Gohman.
      
      llvm-svn: 33011
      bf96e02a
  24. Jan 06, 2007
  25. Dec 31, 2006
    • Reid Spencer's avatar
      For PR950: · c635f47d
      Reid Spencer authored
      This patch replaces signed integer types with signless ones:
      1. [US]Byte -> Int8
      2. [U]Short -> Int16
      3. [U]Int   -> Int32
      4. [U]Long  -> Int64.
      5. Removal of isSigned, isUnsigned, getSignedVersion, getUnsignedVersion
         and other methods related to signedness. In a few places this warranted
         identifying the signedness information from other sources.
      
      llvm-svn: 32785
      c635f47d
  26. Dec 23, 2006
    • Reid Spencer's avatar
      For PR950: · 266e42b3
      Reid Spencer authored
      This patch removes the SetCC instructions and replaces them with the ICmp
      and FCmp instructions. The SetCondInst instruction has been removed and
      been replaced with ICmpInst and FCmpInst.
      
      llvm-svn: 32751
      266e42b3
  27. Dec 19, 2006
  28. Dec 13, 2006
  29. Dec 12, 2006
  30. Dec 07, 2006
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