clobbered by a call.

llvm-svn: 36448

when promoted to 64-bits

llvm-svn: 36442

will follow.

llvm-svn: 36435

llvm-svn: 36430

llvm-svn: 36425

llvm-svn: 36423

llvm-svn: 36407

llvm-svn: 36406

llvm-svn: 36405

llvm-svn: 36404

        vector_shuffle v1, v2, <2, 6, 3, 7>

I.e.

         vector_shuffle v, undef, <2, 2, 3, 3>

MMX only has a shuffle for v4i16 vectors. It needs to use the unpackh for
this type of operation.

llvm-svn: 36403

llvm-svn: 36359

llvm-svn: 36355

llvm-svn: 36318

llvm-svn: 36287

X86 32 bits.

llvm-svn: 36283

llvm-svn: 36279

llvm-svn: 36265

llvm-svn: 36256

llvm-svn: 36213

it is defined in.

llvm-svn: 36196

Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195

llvm-svn: 36185

llvm-svn: 36177

replaced it with a FIXME should have determined what did work.  Then he would have
realized that the code was in fact correct, and would have avoided breaking it.

llvm-svn: 36173

target for tabs checking.

llvm-svn: 36146

llvm-svn: 36028

llvm-svn: 35940

llvm-svn: 35926

llvm-svn: 35884

llvm-svn: 35869

llvm-svn: 35867

llvm-svn: 35845

llvm-svn: 35840

getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint.  This allows us to let the llvm register allocator
allocate, which gives us better code.  For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:

_run_init_process:
        subl $4, %esp
        movl %ebx, (%esp)
        xorl %ebx, %ebx
        movl $11, %eax
        movl %ebx, %ecx
        movl %ebx, %edx
        # InlineAsm Start
        push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

Now we get:
_run_init_process:
        xorl %ecx, %ecx
        movl $11, %eax
        movl %ecx, %edx
        # InlineAsm Start
        push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

llvm-svn: 35804

used with x constraints.

llvm-svn: 35803

llvm-svn: 35799

llvm-svn: 35638

llvm-svn: 35637

llvm-svn: 35634