llvm-svn: 65147

llvm-svn: 65146

llvm-svn: 65145

llvm-svn: 65142

clear insertion point. The rest of IRgen should theoretically take
advantage of this to avoid emitting dead code. Theory != Practice.

llvm-svn: 65141

Always try to fold array sizes, and warn if we could fold something that isn't an ICE. This makes us compatible with GCC.

llvm-svn: 65140

llvm-svn: 65139

interfaces more consistently.

llvm-svn: 65138

llvm-svn: 65137

Factor address mode matcher out of codegen prepare to make it available to other passes, e.g. loop strength reduction.

llvm-svn: 65134

 - PR3463 (again).

llvm-svn: 65133

llvm-svn: 65132

llvm-svn: 65131

 - Remove an unused variant of EmitCallExpr overload.

llvm-svn: 65130

llvm-svn: 65129

llvm-svn: 65128

llvm-svn: 65127

Will re-think about this according to Chris's comments.

llvm-svn: 65126

llvm-svn: 65124

Currently this pass will delete the variable declaration info, 
and keep the line number info. But the kept line number info is not updated, 
and some is redundant or not correct, this patch just updates those info.

llvm-svn: 65123

llvm-svn: 65121

Add a quick pass to the stack slot colorer to eliminate some trivially redundant spills after coloring.
Ideally these would never get created in the first place, but until we enhance the spiller to have a more
global picture of what's happening, this is necessary for code quality in some circumstances.

llvm-svn: 65120

llvm-svn: 65119

options (i.e., -mno-red-zone, -msoft-float, -mno-sse, etc.)
 - Also, make sure unwind tables default to on Darwin/x86_64.
 - PR3604.

llvm-svn: 65118

llvm-svn: 65117

llvm-svn: 65116

llvm-svn: 65115

llvm-svn: 65114

llvm-svn: 65113

llvm-svn: 65112

llvm-svn: 65111

llvm-svn: 65110

llvm-svn: 65109

reduction of address calculations down to basic pointer arithmetic.
This is currently off by default, as it needs a few other features
before it becomes generally useful. And even when enabled, full
strength reduction is only performed when it doesn't increase
register pressure, and when several other conditions are true.

This also factors out a bunch of exisiting LSR code out of
StrengthReduceStridedIVUsers into separate functions, and tidies
up IV insertion. This actually decreases register pressure even
in non-superhero mode. The change in iv-users-in-other-loops.ll
is an example of this; there are two more adds because there are
two fewer leas, and there is less spilling.

llvm-svn: 65108

isn't getting used by Sema or CodeGen at the moment...)

llvm-svn: 65107

llvm-svn: 65106

llvm-svn: 65105

argument; the toolchain should always know the arch.
 - Fixes: <rdar://problem/6582911> -ccc-clang-archs doesn't work for excluding ppc

llvm-svn: 65104

exactly one decl with a specific name in a specific context.  This
avoids a bunch of malloc traffic and shrinks StoredDeclsMap to hold
one pointer instead of 3 words (for a std::vector).

This speeds up -fsyntax-only on cocoa.h with PTH by ~7.3%.

llvm-svn: 65103

 - No functionality change.

llvm-svn: 65102