the masm backend.  If anyone cares about masm in the future,
we'll have semantic sections it can hang off of.

llvm-svn: 78096

For an undef operand, MO.getReg() is meaningless and we should not use it.
Undef operands should be skipped entirely.

llvm-svn: 78095

When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the
kill flag to the place where the sub-register is killed. This can accidentally
overlap with the use of a sibling sub-register, and we have trouble.

In the test case we have this code:

Live Ins: %R0 %R1 %R2
	%R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
	%R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
	%R1L<def> = EXTRACT_SUBREG %R1<kill>, 1
	%R0L<def> = EXTRACT_SUBREG %R0<kill>, 1
	%R0H<def> = ADD16 %R2H<kill>, %R2L<kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>

subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: eliminated!
subreg: killed here: %R0H<def> = ADD16 %R2H, %R2L, %R2<imp-use,kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>

The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H:

*** Bad machine code: Redefining a live physical register ***
- function:    f
- basic block:  0x18358c0 (#0)
- instruction: %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
Register R2H was defined but already live.

The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating
it completely:

subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: replace by: %R2L<def> = IMPLICIT_DEF %R2<kill>

Note that these IMPLICIT_DEF instructions survive to the asm output. It is
necessary to fix the stack-color-with-reg test case because of that.

llvm-svn: 78093

Implicit operands no longer get a free pass: Imp-use requires a live register
and imp-def requires a dead register.

There is also no special rule allowing redefinition of a sub-register when the
super-register is live. The super register must have imp-kill+imp-def operands
instead.

llvm-svn: 78090

The only exception is CC.

llvm-svn: 78089

llvm-svn: 78086

llvm-svn: 78085

llvm-svn: 78083

llvm-svn: 78082

Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.

llvm-svn: 78081

canonical types.

llvm-svn: 78076

killed by another operand.

There is probably a better fix. Either 1) scavenger can look at other operands, or
2) livevariables can be smarter about kill markers. Patches welcome.

llvm-svn: 78072

llvm-svn: 78070

__TEXT,__ustring section on darwin.

llvm-svn: 78068

it is just being used as a prefix, so forward substitute it directly.

llvm-svn: 78067

section on ELF targets.

llvm-svn: 78066

* Use "svn info" to get last revision in repo, will get matching tarballs
* Now run "svn -q" since "svn info" tells us the revision number

llvm-svn: 78065

llvm-svn: 78060

llvm-svn: 78059

llvm-svn: 78057

This fixes PR4666.

llvm-svn: 78056

add new concrete versions for 1/2/4-byte mergable strings.

These are not actually created yet.

llvm-svn: 78055

llvm-svn: 78054

llvm-svn: 78053

llvm-gcc checks the static asm variable is valid in ValidateRegisterVariable. Make this work for PPC.

llvm-svn: 78051

around in a tree I forgot about.

llvm-svn: 78048

llvm-svn: 78047

llvm-svn: 78046

llvm-svn: 78043

llvm-svn: 78042

llvm-svn: 78040

llvm-svn: 78038

llvm-svn: 78035

llvm-svn: 78034

Constants and Metadata share ValueList. This means they must be emitted interleaved (using appropriate BLOCK_IDs) otherwise ValuePtrs index gets out of sync.

llvm-svn: 78033

Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler.

llvm-svn: 78032

llvm-svn: 78031

Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction.

llvm-svn: 78030

results to fixed registers.

llvm-svn: 78025

llvm-svn: 78024