Add support in the EmitMSInlineAsmStr() function for handling integer consts.

llvm-svn: 163645

reinterpret_cast does not provide any of the usual type information that
static_cast or dynamic_cast provide -- only the new type. This can get us
in a situation where the dynamic type info for an object is actually a
superclass of the static type, which does not match what CodeGen does at all.
In these cases, just fall back to the static type as the best possible type
for devirtualization.

Should fix the crashes on our internal buildbot.

llvm-svn: 163644

llvm-svn: 163643

on templates.

llvm-svn: 163642

llvm-svn: 163641

llvm-svn: 163640

Unbreaks the build on FreeBSD

People that are using Linux: if you have any problems with this patch
please let me know, and tell us how you are compiling lldb with the
makefiles.

llvm-svn: 163639

llvm-svn: 163638

Added "heap" command to get info on all allocations on the heap. Currently only objective C objects are supported since they are easy to detect.

llvm-svn: 163637

a pair of switch/branch where both depend on the value of the same variable and
the default case of the first switch/branch goes to the second switch/branch.

Code clean up and fixed a few issues:
1> handling the case where some cases of the 2nd switch are invalidated
2> correctly calculate the weight for the 2nd switch when it is a conditional eq

Testing case is modified from Alastair's original patch.

llvm-svn: 163635

name results in unintended selector name. 
// rdar://12263549

llvm-svn: 163634

llvm-svn: 163633

Sub-register lane masks are bitmasks that can be used to determine if
two sub-registers of a virtual register will overlap. For example, ARM's
ssub0 and ssub1 sub-register indices don't overlap each other, but both
overlap dsub0 and qsub0.

The lane masks will be accurate on most targets, but on targets that use
sub-register indexes in an irregular way, the masks may conservatively
report that two sub-register indices overlap when the eventually
allocated physregs don't.

Irregular register banks also mean that the bits in a lane mask can't be
mapped onto register units, but the concept is similar.

llvm-svn: 163630

Preserve the Composites map in the CodeGenSubRegIndex class so it can be
used to determine which sub-register indices can actually be composed.

llvm-svn: 163629

Apparently, NumSubRegIndices was completely unused before. Adjust it by
one to include the null subreg index, just like getNumRegs() includes
the null register.

llvm-svn: 163628

llvm-svn: 163627

llvm-svn: 163626

llvm-svn: 163625

Dragonegg selfhost exposed additional cases where alloca usage moved outside of lifetime markers. Disabling the pass for now.

llvm-svn: 163623

llvm-svn: 163622

llvm-svn: 163620

At the moment we can handle such arrays only by conservatively assuming that
each access to such an array may touch any element in the array. It would be
great if we could improve Polly/LLVM at some point, such that we can
recover the multi-dimensionality of the accesses.

llvm-svn: 163619

This ensures that the isl sets/maps we operate on have the same parameter
dimensions. Operations on objects with different parameter dimensions are not
allow and trigger assertions.

llvm-svn: 163618

llvm-svn: 163617

llvm-svn: 163616

llvm-svn: 163615

llvm-svn: 163614

llvm-svn: 163613

llvm-svn: 163612

llvm-svn: 163611

[Sanitizer] Add new lit testsuite: check-sanitizer that runs unit tests for sanitizer_common runtime (shared between ASan and TSan)

llvm-svn: 163610

questionable elements to the patch.

llvm-svn: 163609

llvm-svn: 163608

llvm-svn: 163607

c89, c99, and so on.  No change to the default dialect when invoked as clang /
clang++.

llvm-svn: 163605

llvm-svn: 163604

[Sanitizer] Get rid of dependency between sanitizer_common and asan/tsan runtimes: implement tool-specific Die and CheckFailed functions via callbacks

llvm-svn: 163603

llvm-svn: 163602

llvm-svn: 163601

llvm-svn: 163600