llvm-svn: 113747

llvm-svn: 113671

instruction in the class would be decoded to. Or zero if the number of
uOPs must be determined dynamically.

This will be used to determine the cost-effectiveness of predicating a
micro-coded instruction.

llvm-svn: 113513

llvm-svn: 113479

llvm-svn: 113422

llvm-svn: 113401

llvm-svn: 113398

llvm-svn: 113395

llvm-svn: 113393

2-phase build of llvm and llvm-gcc, similar to what the buildbots do, and runs
the regression testsuite.

Things to do:

- Work out some bugs with llvm-gcc flags.
- Not all platforms support ObjC.
- Run the test-suite.

llvm-svn: 113382

llvm-svn: 113261

llvm-svn: 113250

Enable palignr intrinsic.
These may need adjustment for a new VT in due course.

llvm-svn: 113233

llvm-svn: 113198

llvm-svn: 113197

is busted for all variants, report it as the location.  This allows
us to get the operand right for bugs like:

t.s:3:12: error: invalid operand for instruction
	outb %al, %gs
	          ^

Even though there are reg/imm and reg/reg forms of this instruction.

llvm-svn: 113183

of a mneumonic, report operand errors with better location
info.  For example, we now report:

t.s:6:14: error: invalid operand for instruction
        cwtl $1
             ^

but we fail for common cases like:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^

because we don't know if this is supposed to be the reg/imm or imm/reg
form.

llvm-svn: 113178

give a more detailed error.  Before:

t.s:11:4: error: unrecognized instruction
   addl $1, $1
   ^
t.s:12:4: error: unrecognized instruction
   f2efqefa $1
   ^

After:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^
t.s:12:4: error: invalid instruction mnemonic 'f2efqefa'
   f2efqefa $1
   ^

This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands"

llvm-svn: 113176

llvm-svn: 113174

llvm-svn: 113173

llvm-svn: 113172

by doing a binary search over the mnemonic instead of doing a linear
search through all possible instructions.  This implements rdar://7785064

llvm-svn: 113171

MatchInstructionImpl. This makes it easier to read/understand
MatchInstructionImpl.

llvm-svn: 113170

generated matcher, emiting it as a column in the MatchEntry
table instead of forcing it to go through classification and
everything else.  Making it be classified caused tblgen to
produce a ton of one-off classes for each mneumonic.  This
should reduce the size of the generated matcher significantly
while paving the way for future improvements.

llvm-svn: 113169

so only do the N^2 loop with debug mode.

llvm-svn: 113168

failed because a subtarget feature was not enabled.  Use this to
remove a bunch of hacks from the X86AsmParser for rejecting things
like popfl in 64-bit mode.  Previously these hacks weren't needed,
but were important to get a message better than "invalid instruction"
when used in the wrong mode.

This also fixes bugs where pushal would not be rejected correctly in
32-bit mode (just pusha).

llvm-svn: 113166

llvm-svn: 113165

into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.

llvm-svn: 113163

StringMatcher instead of a linear sequence of memcmps.

llvm-svn: 113145

llvm-svn: 113143

copy of a close relative of it.

llvm-svn: 113142

llvm-svn: 113141

"1 strings to match" in a comment, which isn't gramatic.

llvm-svn: 113140

llvm-svn: 113139

out of AsmMatcherEmitter.cpp into its own class.

llvm-svn: 113137

comparing the "llvm." prefix in the memcmp, and not storing it in the string literal.

llvm-svn: 113136

llvm-svn: 113075

llvm-svn: 113071

Generalize getFieldType to work on all TypedInits.  Add a couple of testcases from 
Amaury Pouly.

llvm-svn: 113010

llvm-svn: 112982