The .dot directives don't need labels, that is a leftover from when we created
line number info manually.

Instructions following a DBG_VALUE can share its label since the DBG_VALUE
doesn't produce any code.

llvm-svn: 128284

rdar://problem/9186136

llvm-svn: 128283

for consistency.

llvm-svn: 128282

llvm-svn: 128281

llvm-svn: 128280

llvm-svn: 128279

Replace the call to ParseOptionalCXX0XClassVirtSpecifierSeq with code to only parse an optional 'final' keyword.

llvm-svn: 128278

Get rid of handling of the 'explicit' keyword from class-head. We still parse it though, although that will change shortly.

llvm-svn: 128277

llvm-svn: 128276

llvm-svn: 128275

- Moved the CGObjCRuntime functions out of CGObjCMac.cpp into CGObjCRuntime.cpp

- Added generic functions in CGObjCRuntime for emitting @try and @synchronize
  blocks, usable by any runtime that uses DWARF exceptions.

- Made the GNU runtimes use these functions.

It should now be possible to replace the equivalent functions in
CGObjCNonFragileABIMac with simple calls to these two functions, providing the
runtime functions as arguments.  I'll post a diff to the list for review before
making any changes to the Mac runtime stuff.

llvm-svn: 128274

Remove warnings about using override control keywords in inline function definitions; they will be allowed in the next C++0x draft.

llvm-svn: 128273

llvm-svn: 128272

llvm-svn: 128271

I think it was written by Pawel Worach.

llvm-svn: 128268

llvm-svn: 128267

Yet another case of unchecked NULL node (for physreg copy).
May fix PR9509.

llvm-svn: 128266

llvm-svn: 128257

printing a single character.

llvm-svn: 128256

Add an assertion to linear scan to prevent it from allocating registers outside
the register class.

<rdar://problem/9183021>

llvm-svn: 128254

llvm-svn: 128253

Modify the wrong logic in the assert of DisassembleThumb2LdStDual() (the register classes were changed),
modify the comment to be up-to-date, and add a test case for A8.6.66 LDRD (immediate) Encoding T1.

llvm-svn: 128252

llvm-svn: 128251

llvm-svn: 128250

delegate the disassembly of t2ADR to the more generic t2ADDri12/t2SUBri12 instructions, and add a test case for that.

llvm-svn: 128249

Modified the Disassembler::Instruction base class to contain an Opcode 
instance so that we can know the bytes for an instruction without needing
to keep the data around.

Modified the DisassemblerLLVM's instruction class to correctly extract the
opcode bytes if all goes well.

llvm-svn: 128248

the change to ("tLDMIA", "tLDMIA_UPD").  Update the conflict resolution code and add
test cases for that.

llvm-svn: 128247

According to A8.6.189 STM/STMIA/STMEA (Encoding T1), there's only tSTMIA_UPD available.
Ignore tSTMIA for the decoder emitter and add a test case for that.

llvm-svn: 128246

llvm-svn: 128245

llvm-svn: 128244

llvm-svn: 128243

llvm-svn: 128242

llvm-svn: 128241

These instructions were changed to not embed the addressing mode within the MC instructions
We also need to update the corresponding assert stmt.  Also add a test case.

llvm-svn: 128240

public types and public enums. This was done to keep the SWIG stuff from
parsing all sorts of enums and types that weren't needed, and allows us to
abstract our API better.

llvm-svn: 128239

llvm-svn: 128238

Fix small bug in ThumbExpandImm_C; arguments to a call to 'bits' were
in the wrong order.

llvm-svn: 128237

llvm-svn: 128236

These two are test cases which should result in 'invalid instruction encoding' from running llvm-mc -disassemble.

llvm-svn: 128235

Set the encoding bits to {0,?,?,0}, not 0.  Plus delegate the disassembly of ADR to
the more generic ADDri/SUBri instructions, and add a test case for that.

llvm-svn: 128234