the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).

llvm-svn: 11967

llvm-svn: 11966

and br->br code and generalizing it.  This allows us to compile code like this:

int test(Instruction *I) {
  if (isa<CastInst>(I))
    return foo(7);
  else if (isa<BranchInst>(I))
    return foo(123);
  else if (isa<UnwindInst>(I))
    return foo(1241);
  else if (isa<SetCondInst>(I))
    return foo(1);
  else if (isa<VAArgInst>(I))
    return foo(42);
  return foo(-1);
}

into:

int %_Z4testPN4llvm11InstructionE("struct.llvm::Instruction"* %I) {
entry:
        %tmp.1.i.i.i.i.i.i.i = getelementptr "struct.llvm::Instruction"* %I, long 0, ubyte 4            ; <uint*> [#uses=1]
        %tmp.2.i.i.i.i.i.i.i = load uint* %tmp.1.i.i.i.i.i.i.i          ; <uint> [#uses=2]
        %tmp.2.i.i.i.i.i.i = seteq uint %tmp.2.i.i.i.i.i.i.i, 27                ; <bool> [#uses=0]
        switch uint %tmp.2.i.i.i.i.i.i.i, label %endif.0 [
                 uint 27, label %then.0
                 uint 2, label %then.1
                 uint 5, label %then.2
                 uint 14, label %then.3
                 uint 15, label %then.3
                 uint 16, label %then.3
                 uint 17, label %then.3
                 uint 18, label %then.3
                 uint 19, label %then.3
                 uint 32, label %then.4
        ]
...

As well as handling the cases in 176.gcc and many other programs more effectively.

llvm-svn: 11964

immediately abort due to lack of an instruction selector. :)

llvm-svn: 11963

llvm-svn: 11960

llvm-svn: 11959

llvm-svn: 11958

llvm-svn: 11957

llvm-svn: 11956

llvm-svn: 11955

llvm-svn: 11954

Do not just inject a new prototype.

llvm-svn: 11951

operands. The X86 backend doesn't handle them properly right now.

llvm-svn: 11944

Create a new AddUsesToWorkList method
optimize memmove/set/cpy of zero bytes to a noop.

llvm-svn: 11941

llvm-svn: 11940

llvm-svn: 11939

function, as long as the loop isn't the only one in that function. This should
help debugging passes easier with BugPoint.

llvm-svn: 11936

a new function, taking care of inputs and outputs.

llvm-svn: 11935

llvm-svn: 11933

llvm-svn: 11932

an 8-bit immediate. So mark the shifts that take immediates as taking
an 8-bit argument. The rest with the implicit use of CL are marked
appropriately.

A bug still exists:

def SHLDmri32  : I2A8 <"shld", 0xA4, MRMDestMem>, TB;           // [mem32] <<= [mem32],R32 imm8

The immediate in the above instruction is 8-bit but the memory
reference is 32-bit. The printer prints this as an 8-bit reference
which confuses the assembler. Same with SHRDmri32.

llvm-svn: 11931

llvm-svn: 11930

llvm-svn: 11929

llvm-svn: 11928

llvm-svn: 11927

instructions.

llvm-svn: 11923

them so that they are consistent with AND, XOR, etc...

llvm-svn: 11922

llvm-svn: 11921

llvm-svn: 11919

llvm-svn: 11913

instructions.

llvm-svn: 11907

llvm-svn: 11905

llvm-svn: 11903

consistent with the rest and also pepare for the addition of their
memory operand variants.

llvm-svn: 11902

This is a really minor thing, but might help out the 'switch statement induction'
code in simplifycfg.

llvm-svn: 11900

llvm-svn: 11898

that they are as far away from the loads as possible.

llvm-svn: 11895

MRegisterInfo::isPhysicalRegister().

llvm-svn: 11894

llvm-svn: 11892

Functions with linkonce linkage are declared with weak linkage.
Global floating point constants used to represent unprintable values
(such as NaN and infinity) are declared static so that they don't interfere
with other CBE generated translation units.

llvm-svn: 11884