llvm-svn: 45940

llvm-svn: 45917

llvm-svn: 45914

llvm-svn: 45911

llvm-svn: 45902

llvm-svn: 45898

llvm-svn: 45896

This allows us to sink things like:
	cvtsi2sd	32(%esp), %xmm1
when reading from the argument area, for example.

llvm-svn: 45895

llvm-svn: 45891

- struct_2.ll: Completely unaligned load/store testing

- call_indirect.ll, struct_1.ll: Add test lines to exercise
   X-form [$reg($reg)] addressing

At this point, loads and stores should be under control (he says
in an optimistic tone of voice.)

llvm-svn: 45882

llvm-svn: 45871

llvm-svn: 45870

llvm-svn: 45869

Actually were not riding any arguments. Sadly there is no semantic spell checker that is going to safe you from such a mistake.

llvm-svn: 45868

commit all arguments where moved to the stack slot where they would
reside on a normal function call before the lowering to the tail call
stack slot. This was done to prevent arguments overwriting each other.
Now only arguments sourcing from a FORMAL_ARGUMENTS node or a
CopyFromReg node with virtual register (could also be a caller's
argument) are lowered indirectly.

 --This line, and those below, will be ignored--

M    X86/X86ISelLowering.cpp
M    X86/README.txt

llvm-svn: 45867

llvm-svn: 45865

llvm-svn: 45864

llvm-svn: 45861

llvm-svn: 45860

llvm-svn: 45859

llvm-svn: 45854

llvm-svn: 45852

- Cleaned up custom load/store logic, common code is now shared [see note
  below], cleaned up address modes

- More test cases: various intrinsics, structure element access (load/store
  test), updated target data strings, indirect function calls.

Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode
structures: they now share a common base class, LSBaseSDNode, that
provides an interface to their common functionality. There is some hackery
to access the proper operand depending on the derived class; otherwise,
to do a proper job would require finding and rearranging the SDOperands
sent to StoreSDNode's constructor. The current refactor errs on the
side of being conservatively and backwardly compatible while providing
functionality that reduces redundant code for targets where loads and
stores are custom-lowered.

llvm-svn: 45851

llvm-svn: 45849

Cosmetic changes to spacing to match gcc (some dejagnu
tests actually care).

llvm-svn: 45848

both work right according to the new flags.

This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad. 

It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags.  Now the clients
can decide everything they need.

I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.

llvm-svn: 45843

llvm-svn: 45838

llvm-svn: 45837

Likewise fix up a bunch of other libcalls.  While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere.  This fixes 9 Ada ACATS failures.

llvm-svn: 45833

x86 backend where instructions were not marked maystore/mayload, and perf issues where
instructions were not marked neverHasSideEffects.  It would be really nice if we could
write patterns for copy instructions.

I have audited all the x86 instructions down to MOVDQAmr.  The flags on others and on
other targets are probably not right in all cases, but no clients currently use this
info that are enabled by default.

llvm-svn: 45829

llvm-svn: 45826

llvm-svn: 45825

inferred from the instr patterns.

llvm-svn: 45824

llvm-svn: 45821

instructions (with patterns) that load memory marked, for example.

llvm-svn: 45818

or being side-effect free.

llvm-svn: 45816

llvm-svn: 45813

because assembler/linker can't cope with weak absolutes.
PR 1880.

llvm-svn: 45811

Do not use the stack pointer directly, issue a copyfromreg instead. Otherwise we can end up with something like ADD32ri %esp, x which two-address pass won't like.

llvm-svn: 45798

than hardware supported type will be scalarized, so we
can infer their alignment from that info.

We now codegen pr1845 into:

_boolVectorSelect:
	lbz r2, 0(r3)
	stb r2, -16(r1)
	blr 

llvm-svn: 45796