- Nov 14, 2009
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Jim Grosbach authored
llvm-svn: 88812
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Jim Grosbach authored
llvm-svn: 88805
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Richard Osborne authored
llvm-svn: 88802
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Anton Korobeynikov authored
llvm-svn: 88800
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Daniel Dunbar authored
- This is an initial step towards -march=native support in Clang, and towards eliminating host dependencies in the targets. See PR5389. - Patch by Roman Divacky! llvm-svn: 88768
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Sanjiv Gupta authored
llvm-svn: 88762
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Sanjiv Gupta authored
llvm-svn: 88761
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Evan Cheng authored
- If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. llvm-svn: 88745
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Evan Cheng authored
llvm-svn: 88734
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- Nov 13, 2009
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Jakob Stoklund Olesen authored
llvm-svn: 88705
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David Greene authored
Move DebugInfo checks into EmitComments and remove them from target-specific AsmPrinters. Not all comments need DebugInfo. Re-enable the line numbers comment test. llvm-svn: 88697
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David Goodwin authored
llvm-svn: 88682
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Bruno Cardoso Lopes authored
because the testcase is triggering one more bug. llvm-svn: 88674
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Dale Johannesen authored
PPC is such a target; make it work. llvm-svn: 87060
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Jim Grosbach authored
llvm-svn: 87056
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Jim Grosbach authored
llvm-svn: 87054
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David Greene authored
Fix a bootstrap failure. Provide special isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE interfaces to explicitly request checking for post-frame ptr elimination operands. This uses a heuristic so it isn't reliable for correctness. llvm-svn: 87047
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- Nov 12, 2009
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David Greene authored
Make the MachineFunction argument of getFrameRegister const. This also fixes a build error. llvm-svn: 87027
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David Greene authored
Add hasLoadFromStackSlot and hasStoreToStackSlot to return whether a machine instruction loads or stores from/to a stack slot. Unlike isLoadFromStackSlot and isStoreFromStackSlot, the instruction may be something other than a pure load/store (e.g. it may be an arithmetic operation with a memory operand). This helps AsmPrinter determine when to print a spill/reload comment. This is only a hint since we may not be able to figure this out in all cases. As such, it should not be relied upon for correctness. Implement for X86. Return false by default for other architectures. llvm-svn: 87026
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David Greene authored
Add a bool flag to StackObjects telling whether they reference spill slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
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Benjamin Kramer authored
StringsEqualNoCase (from StringExtras.h) to it. llvm-svn: 87020
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Jim Grosbach authored
to directly follow the jump table. Move the layout changes to prior to any constant island handling. llvm-svn: 86999
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Evan Cheng authored
llvm-svn: 86965
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Evan Cheng authored
llvm-svn: 86964
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Jim Grosbach authored
Revert 86857. It's causing consumer-typeset to fail, and there's a better way to do it forthcoming anyway. llvm-svn: 86945
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Bruno Cardoso Lopes authored
llvm-svn: 86895
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- Nov 11, 2009
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Evan Cheng authored
Add TargetLowering::isLegalICmpImmediate. It tells LSR what immediate can be folded into target icmp instructions. llvm-svn: 86858
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Jim Grosbach authored
llvm-svn: 86857
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Dan Gohman authored
llvm-svn: 86851
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Dan Gohman authored
llvm-svn: 86850
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Chris Lattner authored
llvm-svn: 86848
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Chris Lattner authored
llvm-svn: 86847
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Jim Grosbach authored
The TBB and TBH instructions for Thumb2 are really handy for jump tables, but can only branch forward. To best take advantage of them, we'd like to adjust the basic blocks around a bit when reasonable. This patch puts basics in place to do that, with a super-simple algorithm for backwards jump table targets that creates a new branch after the jump table which branches backwards. Real heuristics for reordering blocks or other modifications rather than inserting branches will follow. llvm-svn: 86791
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Daniel Dunbar authored
llvm-svn: 86769
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Chris Lattner authored
llvm-svn: 86756
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Chris Lattner authored
llvm-svn: 86754
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- Nov 10, 2009
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Dan Gohman authored
llvm-svn: 86732
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Bill Wendling authored
generates a sequence similar to this: __Z4funci: LFB2: mflr r0 LCFI0: stmw r30,-8(r1) LCFI1: stw r0,8(r1) LCFI2: stwu r1,-80(r1) LCFI3: mr r30,r1 LCFI4: where LCFI3 and LCFI4 are used by the FDE to indicate what the FP, LR, and other things are. We generated something more like this: Leh_func_begin1: mflr r0 stw r31, 20(r1) stw r0, 8(r1) Llabel1: stwu r1, -80(r1) Llabel2: mr r31, r1 Note that we are missing the "mr" instruction. This patch makes it more like the GCC output. llvm-svn: 86729
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Evan Cheng authored
[r0, #2 * 4] Now [r0, #8] This makes Thumb2 assembly more uniform and frankly the scale doesn't add much. llvm-svn: 86707
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Evan Cheng authored
llvm-svn: 86706
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