the new way, where all of the information is passed on SDNodes and machine
instructions.

llvm-svn: 64427

after sorting by stride value. This prevents it from missing
IV reuse opportunities in a host-sensitive manner.

llvm-svn: 64415

llvm-svn: 64412

llvm-svn: 64410

Modify callers.

llvm-svn: 64409

loop induction on LP64 targets. When the induction variable is
used in addressing, IndVars now is usually able to inserst a
64-bit induction variable and eliminates the sign-extending cast.
This is also useful for code using C "short" types for
induction variables on targets with 32-bit addressing.

Inserting a wider induction variable is easy; the tricky part is
determining when trunc(sext(i)) expressions are no-ops. This
requires range analysis of the loop trip count. A common case is
when the original loop iteration starts at 0 and exits when the
induction variable is signed-less-than a fixed value; this case
is now handled.

This replaces IndVarSimplify's OptimizeCanonicalIVType. It was
doing the same optimization, but it was limited to loops with
constant trip counts, because it was running after the loop
rewrite, and the information about the original induction
variable is lost by that point.

Rename ScalarEvolution's executesAtLeastOnce to
isLoopGuardedByCond, generalize it to be able to test for
ICMP_NE conditions, and move it to be a public function so that
IndVars can use it.

llvm-svn: 64407

type of the vectors being shuffled.

llvm-svn: 64401

in inline asm as signed (what gcc does).  Add partial support
for x86-specific "e" and "Z" constraints, with appropriate
signedness for printing.

llvm-svn: 64400

gets left behind, it's less cryptic.

llvm-svn: 64399

when the loop has exactly one exit, and make use of it in
LoopIndexSplit.

llvm-svn: 64388

llvm-svn: 64384

llvm-svn: 64383

leaving them in the DAG and then getting selection errors.  This is a 
fix for PR3538.

llvm-svn: 64382

llvm-svn: 64381

llvm-svn: 64379

llvm-svn: 64378

llvm-svn: 64377

llvm-svn: 64376

It's (currently) not safe to keep certain physical registers live across basic blocks, e.g. x86 fp stack registers.

llvm-svn: 64374

llvm-svn: 64373

If availability info is kept when fallthrough into a bb, add the available registers to live-in set.

llvm-svn: 64372

Replace one of burr scheduling heuristic with something more sensible. Now calcMaxScratches simply compute the number of true data dependencies. This actually improve a couple of tests in dejagnu suite as many tests in llvm nightly test suite.

llvm-svn: 64369

exceptions.

llvm-svn: 64367

llvm-svn: 64366

calls with the tail marker when inlining them through an invoke.  Patch,
testcase, and perfect analysis by Jay Foad!

llvm-svn: 64364

llvm-svn: 64363

forget about already inserted expressions.

llvm-svn: 64362

llvm-svn: 64361

Add method 'isSingleton()' to ImmutableSet.  This returns true if the set contains exactly one element.

llvm-svn: 64359

llvm-svn: 64352

llvm-svn: 64342

llvm-svn: 64340

Remove a bogus assertion. It's possible a live-in available value is used by a previous instruction.

llvm-svn: 64339

the two non-mask arguments to a shufflevector must be the same width, but they do not have to be the same
width as the result value.

llvm-svn: 64335

reflect reality.  Acknowledgements to John Clements
for prodding me into this.

llvm-svn: 64332

add efficient versions of op_begin and op_end. Up to now always those from User have been
called, which in most cases follow an indirection (OperandList) even if the exact Instruction 
type is known.

llvm-svn: 64331

llvm-svn: 64329

llvm-svn: 64328

unless they actually have data successors, and likewise for nodes
with no data successors unless they actually have data precessors.

llvm-svn: 64327

llvm-svn: 64324