llvm-svn: 117588

llvm-svn: 117585

llvm-svn: 117584

llvm-svn: 117583

Original commit message:

    On "Unix", if Program::FindProgramByName is given a name containing
    slashes, just go with it, regardless of whether it looks like it will
    be executable. This follows the behavior of sh(1) more closely.

It's better when behaviour is consistent between platforms. This change also
makes FindExecutable() behave as expected on unix-likes (before this commit, it
used to always succeed).

llvm-svn: 117582

llvm-svn: 117581

llvm-svn: 117575

llvm-svn: 117572

llvm-svn: 117571

Move the existing patching for undefined symbols so that all the patching
is done in the same function.

llvm-svn: 117570

llvm-svn: 117563

llvm-svn: 117560

llvm-svn: 117559

Also do some minor refactoring to reduce indentation.

llvm-svn: 117558

Pointed out by Chris!

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a null pointer.

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llvm-svn: 117548

llvm-svn: 117547

llvm-svn: 117546

llvm-svn: 117544

llvm-svn: 117543

llvm-svn: 117538

llvm-svn: 117531

llvm-svn: 117520

- For now, loads of [r, r] addressing mode is the same as the
  [r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should
  identify the former case and reduce the output latency by 1.
- Also identify [r, r << 2] case. This special form of shifter addressing mode
  is "free".

llvm-svn: 117519

by the number of defs first for it to match the instruction itinerary.

llvm-svn: 117518

Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!

llvm-svn: 117514

llvm-svn: 117513

llvm-svn: 117512

llvm-svn: 117511

llvm-svn: 117510

complex load / store addressing mode) when they have higher cost and
when they have more than one use.

llvm-svn: 117509

Putting r117193 back except for the compile time cost. Rather than assuming fallthroughs uses all registers, just gather the union of all successor liveins.

llvm-svn: 117506

the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752

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for specifying fractional bits for fixed point conversions.

llvm-svn: 117501

llvm-svn: 117496

llvm-svn: 117495

llvm-svn: 117494

llvm-svn: 117485