Commits · 1d479dbc55c27628aa1be041bbb81203a8f606f4 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Mar 01, 2011
- Generalize the register matching code in DAGISel a bit. · 1d479dbc
  Jim Grosbach authored Mar 01, 2011
```
llvm-svn: 126731
```
  1d479dbc
- Narrow right shifts need to encode their immediates differently from a normal · 3b1459b8
  Bill Wendling authored Mar 01, 2011
```
shift.

   16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
   32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
   64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>

llvm-svn: 126723
```
  3b1459b8
- Add an obvious missing safety check to DAE::RemoveDeadArgumentsFromCallers. · 683bbc16
  Eli Friedman authored Mar 01, 2011
```
llvm-svn: 126720
```
  683bbc16
- add a note · 0c6cb46a
  Chris Lattner authored Mar 01, 2011
```
llvm-svn: 126719
```
  0c6cb46a
- Unbreak CMake build. · 49d15b95
  Ted Kremenek authored Mar 01, 2011
```
llvm-svn: 126717
```
  49d15b95
- Unbreak CMake build. · 20164dcc
  Ted Kremenek authored Feb 28, 2011
```
llvm-svn: 126715
```
  20164dcc
- Add an END_WITH_NULL accessor for ConstantStruct. · 3a0a30d4
  Talin authored Feb 28, 2011
```
llvm-svn: 126714
```
  3a0a30d4
Feb 28, 2011
- update cmake · 1ac5e0c5
  Chris Lattner authored Feb 28, 2011
```
llvm-svn: 126694
```
  1ac5e0c5
- Fix .fpu printing in ARM assembly, regarding bug http://llvm.org/bugs/show_bug.cgi?id=8931 · ec0fc7d8
  Renato Golin authored Feb 28, 2011
```
llvm-svn: 126689
```
  ec0fc7d8
- Add missing whitespace in the formatting. · 63b0d108
  Kevin Enderby authored Feb 28, 2011
```
llvm-svn: 126687
```
  63b0d108
- Make all static functions become static class methods. Move shared... · 30a52dec
  Jan Sjödin authored Feb 28, 2011
```
Make all static functions become static class methods. Move shared (duplicated) functions to new MCELF class.

llvm-svn: 126686
```
  30a52dec
- Use the correct shift amount type. · 0dc63104
  Owen Anderson authored Feb 28, 2011
```
llvm-svn: 126684
```
  0dc63104
- Clean whitespace. · 4f4df818
  Owen Anderson authored Feb 28, 2011
```
llvm-svn: 126683
```
  4f4df818
- fix a signed comparison warning. · c93d207e
  Chris Lattner authored Feb 28, 2011
```
llvm-svn: 126682
```
  c93d207e
- Delete the GEPSplitter experiment. · 06d70015
  Dan Gohman authored Feb 28, 2011
```
llvm-svn: 126671
```
  06d70015
- Delete the SimplifyHalfPowrLibCalls pass, which was unused, and · b8a25f49
  Dan Gohman authored Feb 28, 2011
```
only existed as the result of a misunderstanding.

llvm-svn: 126669
```
  b8a25f49
- Delete the LiveValues pass. I won't get get back to the project it · 16105883
  Dan Gohman authored Feb 28, 2011
```
was started for in the foreseeable future.

llvm-svn: 126668
```
  16105883
- · 20a1cbef
  David Greene authored Feb 28, 2011
```
[AVX] Add decode support for VUNPCKLPS/D instructions, both 128-bit
      and 256-bit forms.  Because the number of elements in a vector
      does not determine the vector type (4 elements could be v4f32 or
      v4f64), pass the full type of the vector to decode routines.

llvm-svn: 126664
```
  20a1cbef
- Fix the arm's disassembler for blx that was building an MCInst without the · 58775fea
  Kevin Enderby authored Feb 28, 2011
```
needed two predicate operands before the imm operand.

llvm-svn: 126662
```
  58775fea
- Fix a typo which cause dag combine crash. rdar://9059537. · 6e3d4436
  Evan Cheng authored Feb 28, 2011
```
llvm-svn: 126661
```
  6e3d4436
- Support for byval parameters on ARM. Will be enabled by a forthcoming · 67c5c3e9
  Stuart Hastings authored Feb 28, 2011
```
patch to the front-end.  Radar 7662569.

llvm-svn: 126655
```
  67c5c3e9
- Add branch hinting for SPU. · 612b85e5
  Kalle Raiskila authored Feb 28, 2011
```
The implemented algorithm is overly simplistic (just speculate all branches are
taken)- this is work in progress.

llvm-svn: 126651
```
  612b85e5
- Teach SimplifyCFG that (switch (select cond, X, Y)) is better expressed as a branch. · 8ae07996
  Frits van Bommel authored Feb 28, 2011
```
Based on a patch by Alistair Lynn.

llvm-svn: 126647
```
  8ae07996
- Fix comment. · afe4a306
  Nick Lewycky authored Feb 28, 2011
```
llvm-svn: 126645
```
  afe4a306
- srem doesn't actually have the same resulting sign as its numerator, you could · 66f4f22f
  Nick Lewycky authored Feb 28, 2011
```
also have a zero when numerator = denominator. Reverts parts of r126635 and
r126637.

llvm-svn: 126644
```
  66f4f22f
- Teach InstCombine to fold "(shr exact X, Y) == 0" --> X == 0, fixing #1 from · 174a7054
  Nick Lewycky authored Feb 28, 2011
```
PR9343.

llvm-svn: 126643
```
  174a7054
- Teach value tracking to make use of flags in more situations. · c9aab856
  Nick Lewycky authored Feb 28, 2011
```
llvm-svn: 126642
```
  c9aab856
- Teach ValueTracking to look at the dividend when determining the sign bit of an · 29dbbd12
  Nick Lewycky authored Feb 28, 2011
```
srem instruction.

llvm-svn: 126637
```
  29dbbd12
- Add preliminary support for .f32 in the PTX backend. · 75a800d3
  Che-Liang Chiou authored Feb 28, 2011
```
- Add appropriate TableGen patterns for fadd, fsub, fmul.
- Add .f32 as the PTX type for the LLVM float type.
- Allow parameters, return values, and global variable declarations
  to accept the float type.
- Add appropriate test cases.

Patch by Justin Holewinski

llvm-svn: 126636
```
  75a800d3
- The sign of an srem instruction is the sign of its dividend (the first · 6b445419
  Nick Lewycky authored Feb 28, 2011
```
argument), regardless of the divisor. Teach instcombine about this and fix
test7 in PR9343!

llvm-svn: 126635
```
  6b445419
Feb 27, 2011
- Silence enum conversion warnings. · 25bddae4
  Benjamin Kramer authored Feb 27, 2011
```
llvm-svn: 126578
```
  25bddae4
- Legalize support for fpextend of vector. PR9309. · f571290d
  Duncan Sands authored Feb 27, 2011
```
llvm-svn: 126574
```
  f571290d
- Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit... · d4e5003a
  NAKAMURA Takumi authored Feb 27, 2011
```
Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit "spill/reload frames" for XMMs.

It improves Win64's prologue/epilogue but it would not affect ia32 and amd64 (lack of nonvolatile XMMs).

llvm-svn: 126568
```
  d4e5003a
- Fix typos in the comments. · b0091302
  Nadav Rotem authored Feb 27, 2011
```
llvm-svn: 126565
```
  b0091302
- RegionPrinter: Ignore back edges when layouting the graph · 98eecaf0
  Tobias Grosser authored Feb 27, 2011
```
llvm-svn: 126564
```
  98eecaf0
- Pass the graph to the DOTGraphTraits.getEdgeAttributes(). · 3ac8689f
  Tobias Grosser authored Feb 27, 2011
```
This follows the interface of getNodeAttributes.

llvm-svn: 126562
```
  3ac8689f
- Support: Add llvm::AreStatisticsEnabled(). · 06dfe8e9
  Daniel Dunbar authored Feb 26, 2011
```
llvm-svn: 126558
```
  06dfe8e9
Feb 26, 2011

Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize... · 26691d96

Benjamin Kramer authored Feb 26, 2011

Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize legalized code for large integer arithmetic.

1. Inform users of ADDEs with two 0 operands that it never sets carry
2. Fold other ADDs or ADDCs into the ADDE if possible

It would be neat if we could do the same thing for SETCC+ADD eventually, but we can't do that in target independent code.

llvm-svn: 126557

26691d96

Feb 25, 2011
- Trailing whitespace. · 416c4701
  Jim Grosbach authored Feb 25, 2011
```
llvm-svn: 126526
```
  416c4701
- Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS. · b2c80da4
  Owen Anderson authored Feb 25, 2011
```
llvm-svn: 126518
```
  b2c80da4