- Feb 22, 2010
-
-
Johnny Chen authored
o signed/unsigned add/subtract o signed/unsigned halving add/subtract o unsigned sum of absolute difference [and accumulate] o signed/unsigned saturate o signed multiply accumulate/subtract [long] dual llvm-svn: 96795
-
- Feb 21, 2010
-
-
Johnny Chen authored
handled in ARMInstPrinter.cpp. And added PLD/PLDW/PLI (Preload Data/Instruction) for disassembly only. llvm-svn: 96719
-
- Feb 19, 2010
-
-
Bob Wilson authored
the armv6 nightly tests. llvm-svn: 96691
-
Johnny Chen authored
out the canonical form (A8.6.98) instead of the pseudo-instruction as provided via MOVs. DBG_ARM_DISASM=YES llvm-mc -triple=arm-unknown-unknown --disassemble 0xc0 0x00 0xa0 0xe1 Opcode=29 Name=ASR Format=ARM_FORMAT_LDMISCFRM 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ------------------------------------------------------------------------------------------------- | 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0| 0: 0: 0: 0| ------------------------------------------------------------------------------------------------- asr r0, r0, #1 llvm-svn: 96654
-
Jim Grosbach authored
for ARM to just check if a function has a FP to determine if it's safe to simplify the stack adjustment pseudo ops prior to eliminating frame indices. Allow targets to override the default behavior and does so for ARM and Thumb2. llvm-svn: 96634
-
- Feb 18, 2010
-
-
Johnny Chen authored
llvm-svn: 96619
-
Bob Wilson authored
Radar 7461718. llvm-svn: 96572
-
Johnny Chen authored
of AI3ldsbpo, AI3ldhpo, and AI3ldshpo in ARMInstrFormats.td in the process. llvm-svn: 96565
-
Johnny Chen authored
llvm-svn: 96540
-
- Feb 17, 2010
-
-
Bob Wilson authored
since it has no pattern, there's not much point in distinguishing an "N2VS" class for intrinsics anyway. llvm-svn: 96525
-
Johnny Chen authored
A8.6.30 llvm-svn: 96523
-
Bob Wilson authored
* Use "S" abbreviation for scalar single FP registers in class and pattern names, instead of keeping the "D" (for "double") abbreviation and tacking on an "s" elsewhere in the name. * Move the scalar single FP register classes and patterns to be more consistent with other definitions in the file. * Rename "VNEGf32d" definition to "VNEGfd" for consistency. * Deleted the N2VDIntsPat pattern; N2VSPat is good enough. llvm-svn: 96521
-
Johnny Chen authored
B6.1.8 RFE Return From Exception loads the PC and the CPSR from the word at the specified address and the following word respectively. llvm-svn: 96519
-
Chris Lattner authored
llvm-svn: 96490
-
Johnny Chen authored
A8.6.18 BFI - Bitfield insert (Encoding A1) llvm-svn: 96462
-
Bob Wilson authored
indentation. No functional changes. llvm-svn: 96418
-
- Feb 16, 2010
-
-
Bob Wilson authored
build failures due to my fix for pr6111. llvm-svn: 96402
-
Johnny Chen authored
llvm-svn: 96401
-
Jim Grosbach authored
llvm-svn: 96393
-
Jim Grosbach authored
llvm-svn: 96388
-
Jim Grosbach authored
to have the predicate on the pattern itself instead. Support for the new ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are no longer used anywhere. llvm-svn: 96384
-
Jim Grosbach authored
llvm-svn: 96383
-
Jim Grosbach authored
They won't work with the new ISel mechanism, as Requires predicates are no longer allowed to reference the node being selected. Moving the predicate to the patterns instead solves the problem. This patch handles ARM mode. Thumb2 will follow. llvm-svn: 96381
-
Johnny Chen authored
o Store Return State (SRSW, SRS) o Load/Store Coprocessor (LDC/STC and friends) o MSR (immediate) llvm-svn: 96380
-
Bob Wilson authored
branch in ARM v4 code, since it gets clobbered by the return address before it is used. Instead of adding a new register class containing all the GPRs except LR, just use the existing tGPR class. llvm-svn: 96360
-
Bob Wilson authored
We could almost use a multiclass for the signed/unsigned instructions, but there are only 6 of them so I guess it's not worth it. llvm-svn: 96297
-
- Feb 15, 2010
-
-
Anton Korobeynikov authored
llvm-svn: 96288
-
Evan Cheng authored
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use. This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses. llvm-svn: 96255
-
David Greene authored
change to SelectionDAG build APIs. llvm-svn: 96230
-
- Feb 14, 2010
-
-
Johnny Chen authored
as suggested by Bob Wilson. llvm-svn: 96153
-
- Feb 13, 2010
-
-
Johnny Chen authored
llvm-svn: 96075
-
Evan Cheng authored
created. This ensures it's updated at all time. It means targets which perform dynamic stack alignment would know whether it is required and whether frame pointer register cannot be made available register allocation. This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test case. llvm-svn: 96069
-
Johnny Chen authored
llvm-svn: 96063
-
- Feb 12, 2010
-
-
Johnny Chen authored
Plus add two formats: MiscFrm and ThumbMiscFrm. Some of the for disassembly only instructions are changed from Pseudo Format to MiscFrm Format. llvm-svn: 96032
-
Evan Cheng authored
Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case. llvm-svn: 96023
-
Johnny Chen authored
llvm-svn: 96019
-
Johnny Chen authored
llvm-svn: 96010
-
Johnny Chen authored
llvm-svn: 95999
-
Johnny Chen authored
MRRC, MRRc2. For disassembly only. llvm-svn: 95955
-
- Feb 11, 2010
-
-
Johnny Chen authored
llvm-svn: 95916
-