Removed the check that peeks past EXTRA_SUBREG, which I don't think
makes sense any more. Intead treat it as a normal register def. No
significant affect on x86 or ARM benchmarks.

llvm-svn: 133917

Also fix some of the tests that were actually testing wrong behavior -
An input operand in {st} is only popped by the inline asm when {st} is
also in the clobber list.

The original bug reports all had ~{st} clobbers as they should.

llvm-svn: 133916

Patch by Sanjoy Das!

llvm-svn: 133910

alloca that only holds a copy of a global and we're going to replace the users
of the alloca with that global, just nuke the lifetime intrinsics. Part of
PR10121.

llvm-svn: 133905

passes as well.

llvm-svn: 133904

This allows for more live scratch registers which is needed to handle
live ST registers before return and inline asm instructions.

llvm-svn: 133903

Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we
now use two different asm operand kinds.

The new Kind_Clobber is treated identically to the old
Kind_RegDefEarlyClobber for now, but x87 floating point stack inline
assembly does care about the difference.

This will pop a register off the stack:

  asm("fstp %st" : : "t"(x) : "st");

While this will pop the input and push an output:

  asm("fst %st" : "=&t"(r) : "t"(x));

We need to know if ST0 was a clobber or an output operand, and we can't
depend on <dead> flags for that.

llvm-svn: 133902

The INLINEASM MachineInstrs have an immediate operand describing each
original inline asm operand. Decode the bits in MachineInstr::print() so
it is easier to read:

  INLINEASM <es:rorq $1,$0>, $0:[regdef], %vreg0<def>, %vreg1<def>, $1:[imm], 1, $2:[reguse] [tiedto:$0], %vreg2, %vreg3, $3:[regdef-ec], %EFLAGS<earlyclobber,imp-def>

llvm-svn: 133901

llvm-svn: 133900

remove the analysis group.

llvm-svn: 133899

llvm-svn: 133897

llvm-svn: 133896

llvm-svn: 133895

llvm-svn: 133886

llvm-svn: 133875

llvm-svn: 133874

The .b8 operations in PTX are far more limiting than I first thought. The mov operation isn't even supported, so there's no way of converting a .pred value into a .b8 without going via .b16, which is
not sensible. An improved implementation needs to use the fact that loads and stores automatically extend and truncate to implement support for EXTLOAD and TRUNCSTORE in order to correctly support
boolean values.

llvm-svn: 133873

llvm-svn: 133872

llvm-svn: 133871

llvm-svn: 133870

llvm-svn: 133869

llvm-svn: 133868

pointing to the range [first character, last character] instead of just not
after the last character. Patch by Yan Ivnitskiy!

llvm-svn: 133867

llvm-svn: 133863

llvm-svn: 133859

<rdar://problem/9483883>

llvm-svn: 133858

Hopefully make the x86-target-only Windows bots happy.

llvm-svn: 133856

llvm-svn: 133853

llvm-svn: 133851

llvm-svn: 133847

llvm-svn: 133846

llvm-svn: 133845

Move the target-specific RecordRelocation logic out of the generic MC
MachObjectWriter and into the target-specific object writers. This allows
nuking quite a bit of target knowledge from the supposedly target-independent
bits in lib/MC.

llvm-svn: 133844

The scheduler needs to be aware on the existence of untyped nodes when it performs type propagation for EXTRACT_SUBREG.

llvm-svn: 133838

Sorry, this was a bad idea.  Within clang these builtins are in a separate
"ARM" namespace, but the actual builtin names should clearly distinguish that
they are target specific.

llvm-svn: 133832

llvm-svn: 133830

llvm-svn: 133828

llvm-svn: 133825

overheads.  No functional change intended.

llvm-svn: 133824

llvm-svn: 133823