1. Legalize now always promotes truncstore of i1 to i8. 
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
   X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
   safe.

The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:

_foo:
	fldt	20(%esp)
	fldt	4(%esp)
	faddp	%st(1)
	movl	36(%esp), %eax
	fstps	(%eax)
	ret

instead of:

_foo:
	subl	$4, %esp
	fldt	24(%esp)
	fldt	8(%esp)
	faddp	%st(1)
	fstps	(%esp)
	movl	40(%esp), %eax
	movss	(%esp), %xmm0
	movss	%xmm0, (%eax)
	addl	$4, %esp
	ret

llvm-svn: 46140

Move definition of 'trap' sdnode up from x86 instrinfo to targetselectiondag.td.

llvm-svn: 46017

llvm-svn: 45825

instructions (with patterns) that load memory marked, for example.

llvm-svn: 45818

llvm-svn: 45656

instead of "ISD::STORE".  This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores).  This allows us to remove
more explicit isStore flags from the .td files.

Finally, add a warning for when a .td file contains an explicit 
isStore and tblgen is able to infer it.

llvm-svn: 45654

llvm-svn: 45418

llvm-svn: 44303

llvm-svn: 44045

llvm-svn: 42282

1.
[(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
 (modify EFLAGS)]
This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS.
2.
def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()>
Similar to #1 except this is used for def : Pat patterns.

llvm-svn: 41897

Lots of problems yet but some simple things work.

llvm-svn: 40847

llvm-svn: 40516

llvm-svn: 39921

X86 32 bits.

llvm-svn: 36283

llvm-svn: 33537

stores.

llvm-svn: 31735

llvm-svn: 31596

llvm-svn: 31576

llvm-svn: 31210

llvm-svn: 30945

llvm-svn: 30891

llvm-svn: 30878

llvm-svn: 30844

extra operand to LOADX to specify the exact value extension type.

llvm-svn: 30714

llvm-svn: 28798

x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.

llvm-svn: 27947

llvm-svn: 27843

llvm-svn: 27834

bitconverted from some other type.

llvm-svn: 27724

llvm-svn: 27303

Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value.  Split them into separate enums.

llvm-svn: 27201

llvm-svn: 27166

llvm-svn: 27148

llvm-svn: 27132

llvm-svn: 27100

llvm-svn: 27073

llvm-svn: 27070

llvm-svn: 26911

llvm-svn: 26895