and add a sparc implementation that knows about delay slots.  Patch by
Nathan Keynes!

llvm-svn: 96492

llvm-svn: 96490

cloned functions.

llvm-svn: 96485

cases that are not part of the enum.

llvm-svn: 96477

with mangled names).

llvm-svn: 96465

Renamed PIC16FrameOverlay namespace to PIC16OVERLAY.
Renamed PIC16FrameOverlay class to PIC16Overlay.

llvm-svn: 96463

A8.6.18  BFI - Bitfield insert (Encoding A1)

llvm-svn: 96462

tblgen splatted code into the implementation.

llvm-svn: 96460

reverse engineering what they are.

llvm-svn: 96456

Hopefully, this will fix the remaining issues seen there.

llvm-svn: 96454

Removed an early out which was causing the PBQP allocator to not compute live-in sets or run the rewriter.

llvm-svn: 96450

case where there are loop-invariant instructions somehow left
inside the loop, and in a position where they won't dominate
the IV increment position.

llvm-svn: 96448

Before setting scope end marker, pay attention to scope begin marker and existing scope end marker, if any. Scope must begin before it ends and nested inlined scope do not truncate surrounding scope.

llvm-svn: 96445

llvm-svn: 96440

It's not clear why this is really required, but it was explicitly
added in r48808 with no real explanation or rdar #.

llvm-svn: 96438

This pass is supposed to be run on the linked .bc module.
It traveses the module call graph twice. Once starting from the main function
and marking each reached function as "ML". Again, starting from the ISR
and cloning any reachable function that was marked as "ML". After cloning
the function, it remaps all the call sites in IL functions to call the
cloned functions. 

Currently only marking is being done.

llvm-svn: 96435

llvm-svn: 96432

llvm-svn: 96429

have overflowed.

llvm-svn: 96428

64 bits, fixing a variety of problems.

llvm-svn: 96421

indentation.  No functional changes.

llvm-svn: 96418

llvm-svn: 96410

into a roundss intrinsic, producing a cyclic dag.  The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection.  Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.

llvm-svn: 96408

build failures due to my fix for pr6111.

llvm-svn: 96402

llvm-svn: 96401

llvm-svn: 96399

llvm-svn: 96395

llvm-svn: 96393

If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).

Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335

llvm-svn: 96389

llvm-svn: 96388

llvm-svn: 96387

Add support for emitting non-temporal stores for DAGs marked
non-temporal.  Fix from r96241 for botched encoding of MOVNTDQ.

Add documentation for !nontemporal metadata.

Add a simpler movnt testcase.

llvm-svn: 96386

to have the predicate on the pattern itself instead. Support for the new
ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are
no longer used anywhere.

llvm-svn: 96384

llvm-svn: 96383

llvm-svn: 96382

They won't work with the new ISel mechanism, as Requires predicates are no
longer allowed to reference the node being selected. Moving the predicate to
the patterns instead solves the problem.

This patch handles ARM mode. Thumb2 will follow.

llvm-svn: 96381

o Store Return State (SRSW, SRS)
o Load/Store Coprocessor (LDC/STC and friends)
o MSR (immediate)

llvm-svn: 96380

llvm-svn: 96378

terminator's list of successors.

llvm-svn: 96377

llvm-svn: 96372