Commits · 20853a7807790a6b5ca13aab1edb0b4e96199915 · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Dec 18, 2018
- [InstCombine] Simplify cttz/ctlz + icmp eq/ne into mask check · 20853a78
  Nikita Popov authored Dec 18, 2018
  20853a78
- [AMDGPU] Removed the unnecessary operand size-check-assert from processBaseWithConstOffset(). · 59ee2c53
  Farhana Aleen authored Dec 18, 2018
  59ee2c53
- DebugInfo: Fix missing local imported entities after r349207 · 693f6177
  David Blaikie authored Dec 18, 2018
  693f6177
- [SCCP] Get rid of redundant call for getPredicateInfoFor (NFC). · 5c014037
  Florian Hahn authored Dec 18, 2018
  5c014037
- [X86] Don't use SplitOpsAndApply to create ISD::UADDSAT/ISD::USUBSAT nodes.... · 8434ef7d
  Craig Topper authored Dec 18, 2018
  8434ef7d
- [InstCombine] refactor isCheapToScalarize(); NFC · e51d5bdb
  Sanjay Patel authored Dec 18, 2018
  e51d5bdb
- [X86] Use SADDSAT/SSUBSAT instead of ADDS/SUBS · f6058ff1
  Nikita Popov authored Dec 18, 2018
  f6058ff1
- [X86] Create PSUBUS from (add (umax X, C), -C) · 20a6db5a
  Craig Topper authored Dec 18, 2018
  20a6db5a
- Buildfix for r345516 (Clang compilation failing). · b536bf52
  Alexandre Ganea authored Dec 18, 2018
  b536bf52
- [CMake] Default options for faster executables on MSVC · b5053199
  Alexandre Ganea authored Dec 18, 2018
  b5053199
- [llvm-symbolizer] Omit stderr output when symbolizing a crash · b67d91e0
  Alexandre Ganea authored Dec 18, 2018
  b67d91e0
- [InstCombine] add tests for scalarization; NFC · e0afd278
  Sanjay Patel authored Dec 18, 2018
  e0afd278
- Add FMF management to common fp intrinsics in GlobalIsel · c6a5245c
  Michael Berg authored Dec 18, 2018
  c6a5245c
- [LoopVectorize] Rename pass options. NFC. · d4eb13c8
  Michael Kruse authored Dec 18, 2018
  d4eb13c8
- [X86][SSE] Don't use 'sign bit select' vXi8 ROTL lowering for constant rotation amounts · 14119174
  Simon Pilgrim authored Dec 18, 2018
  14119174
- [LoopUnroll] Honor '#pragma unroll' even with -fno-unroll-loops. · 3284775b
  Michael Kruse authored Dec 18, 2018
  3284775b
- [X86][SSE] Don't use 'sign bit select' vXi8 ROTL lowering for splat rotation amounts · e9effe97
  Simon Pilgrim authored Dec 18, 2018
  e9effe97
- [MIPS GlobalISel] Select G_SDIV, G_UDIV, G_SREM and G_UREM · 0a5e4eb7
  Petar Avramovic authored Dec 18, 2018
  0a5e4eb7
- [gn build] Add build file for llvm-pdbutil · 1164dab2
  Nico Weber authored Dec 18, 2018
  1164dab2
- [gn build] Add build file for llvm-bcanalyzer · 6dc08550
  Nico Weber authored Dec 18, 2018
  6dc08550
- [gn build] Add build files for llvm-ar, llvm-nm, llvm-objdump, llvm-readelf · 6b66308f
  Nico Weber authored Dec 18, 2018
  6b66308f
- [X86][SSE] Add shift combine 'out of range' tests with UNDEFs · be0fbe67
  Simon Pilgrim authored Dec 18, 2018
  be0fbe67
- [X86] Use UADDSAT/USUBSAT instead of ADDUS/SUBUS · 665ab081
  Nikita Popov authored Dec 18, 2018
  665ab081
- [SelectionDAG][X86] Fix [US](ADD|SUB)SAT vector legalization, add tests · a7d2a235
  Nikita Popov authored Dec 18, 2018
  a7d2a235
- [docs] Improve HowToCrossCompilerBuiltinsOnArm · d1328e1a
  Peter Smith authored Dec 18, 2018
  d1328e1a
- [llvm-dwarfdump] - Do not error out on R_X86_64_DTPOFF64/R_X86_64_DTPOFF32 relocations. · 1ec49110
  George Rimar authored Dec 18, 2018
  1ec49110
- [MIPS GlobalISel] ClampScalar G_AND G_OR and G_XOR · 150fd430
  Petar Avramovic authored Dec 18, 2018
  150fd430
- [AArch64] - Return address signing dwarf support · f57d7d82
  Luke Cheeseman authored Dec 18, 2018
  f57d7d82
- [X86][AVX] Add 256/512-bit vector funnel shift tests · ba8e84b3
  Simon Pilgrim authored Dec 18, 2018
  ba8e84b3
- [X86][SSE] Add 128-bit vector funnel shift tests · 46b90e85
  Simon Pilgrim authored Dec 18, 2018
  46b90e85
- [IPO][AVR] Create new Functions in the default address space specified in the data layout · f920da00
  Dylan McKay authored Dec 18, 2018
  f920da00
- AMDGPU: Legalize/regbankselect frame_index · c94e26c7
  Matt Arsenault authored Dec 18, 2018
  c94e26c7
- AMDGPU: Legalize/regbankselect fma · c0ea2210
  Matt Arsenault authored Dec 18, 2018
  c0ea2210
- [TargetLowering] Fallback from SimplifyDemandedVectorElts to SimplifyDemandedBits · af6fbbf1
  Simon Pilgrim authored Dec 18, 2018
  af6fbbf1
- SROA: preserve alignment tags on loads and stores. · 856628f7
  Tim Northover authored Dec 18, 2018
  856628f7
- GlobalISel: Improve crash on invalid mapping · 1ac38ba7
  Matt Arsenault authored Dec 18, 2018
  1ac38ba7
- AMDGPU/GlobalISel: Legalize/regbankselect fneg/fabs/fsub · e01e7c81
  Matt Arsenault authored Dec 18, 2018
  e01e7c81
- [X86][SSE] Move VSRAI sign extend in reg fold into SimplifyDemandedBits · 8488a44c
  Simon Pilgrim authored Dec 18, 2018
  8488a44c
- [X86][SSE] Replace (VSRLI (VSRAI X, Y), 31) -> (VSRLI X, 31) fold. · 26c630f4
  Simon Pilgrim authored Dec 18, 2018
  26c630f4
- Introduce control flow speculation tracking pass for AArch64 · e66bc1f7
  Kristof Beyls authored Dec 18, 2018
  e66bc1f7