llvm-svn: 35102

llvm-svn: 35101

llvm-svn: 35100

llvm-svn: 35099

llvm-svn: 35098

llvm-svn: 35097

llvm-svn: 35096

llvm-svn: 35095

llvm-svn: 35094

llvm-svn: 35093

llvm-svn: 35091

llvm-svn: 35090

e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4

Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2

This creates more short live intervals which work better with the register
allocator.

llvm-svn: 35089

llvm-svn: 35088

llvm-svn: 35087

llvm-svn: 35086

llvm-svn: 35084

llvm-svn: 35083

Fix PR1244 and Transforms/InstCombine/2007-03-13-CompareMerge.ll

llvm-svn: 35082

llvm-svn: 35081

"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)",
to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of
zext().

llvm-svn: 35080

llvm-svn: 35079

  1. Ensure VTy, KnownOne and KnownZero have same bitwidth.
  2. Make code more efficient.

llvm-svn: 35078

llvm-svn: 35077

More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.

llvm-svn: 35076

llvm-svn: 35075

More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.

llvm-svn: 35074

 a legal target address immediate or scale.

llvm-svn: 35073

llvm-svn: 35072

a legal target address immediate or scale.

llvm-svn: 35071

llvm-svn: 35070

llvm-svn: 35068

llvm-svn: 35067

can collide with system defined names.  Windows defines _BB, for example.

llvm-svn: 35066

llvm-svn: 35065

Patch by Zhou Sheng.

llvm-svn: 35064

Patch by Zhou Sheng.

llvm-svn: 35063

llvm-svn: 35062

  1. Replace getSignedMinValue() with getSignBit() for better code readability.
  2. Replace APIntOps::shl() with operator<<= for convenience.
  3. Make APInt construction more effective.

llvm-svn: 35060

llvm-svn: 35059