- Oct 11, 2010
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Eric Christopher authored
llvm-svn: 116212
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Francois Pichet authored
llvm-svn: 116201
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Eric Christopher authored
llvm-svn: 116198
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Eric Christopher authored
llvm-svn: 116197
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Eric Christopher authored
llvm-svn: 116196
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Eric Christopher authored
llvm-svn: 116195
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Eric Christopher authored
llvm-svn: 116194
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- Oct 09, 2010
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Evan Cheng authored
llvm-svn: 116143
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Evan Cheng authored
llvm-svn: 116140
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Evan Cheng authored
llvm-svn: 116136
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Evan Cheng authored
llvm-svn: 116135
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Evan Cheng authored
1. Cortex-A8 load / store multiplies can only issue on ALU0. 2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues. 3. Correctly model all vld1 and vld2 variants. llvm-svn: 116134
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Bill Wendling authored
before decrementing. <rdar://problem/8529919> llvm-svn: 116126
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Eric Christopher authored
llvm-svn: 116123
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- Oct 08, 2010
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Jim Grosbach authored
concept level stuff at this point, but it is generally working for those instructions that know how to map the operands. This patch fills in the register operands for add/sub/or/etc instructions and adds the conditional execution predicate encoding. llvm-svn: 116112
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Jim Grosbach authored
''const'ify getMachineOpValue() and associated helpers.' llvm-svn: 116067
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Jim Grosbach authored
llvm-svn: 116064
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Jim Grosbach authored
llvm-svn: 116059
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Bob Wilson authored
callee-saved registers at the end of the lists. Also prefer to avoid using the low registers that are in register subclasses required by certain instructions, so that those registers will more likely be available when needed. This change makes a huge improvement in spilling in some cases. Thanks to Jakob for helping me realize the problem. Most of this patch is fixing the testsuite. There are quite a few places where we're checking for specific registers. I changed those to wildcards in places where that doesn't weaken the tests. The spill-q.ll and thumb2-spill-q.ll tests stopped spilling with this change, so I added a bunch of live values to force spills on those tests. llvm-svn: 116055
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Eric Christopher authored
as thumb1. Fixes lencod. llvm-svn: 116027
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Jim Grosbach authored
llvm-svn: 116022
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Jim Grosbach authored
llvm-svn: 116018
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Evan Cheng authored
llvm-svn: 116002
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Jim Grosbach authored
llvm-svn: 115993
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- Oct 07, 2010
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Jim Grosbach authored
llvm-svn: 115987
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Eric Christopher authored
llvm-svn: 115984
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Jim Grosbach authored
for them from the MCCodeEmitter. llvm-svn: 115975
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Eric Christopher authored
compilation of MultiSource/Benchmarks/Bullet. llvm-svn: 115907
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Eric Christopher authored
llvm-svn: 115906
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Eric Christopher authored
llvm-svn: 115905
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Eric Christopher authored
llvm-svn: 115904
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Evan Cheng authored
llvm-svn: 115898
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Jim Grosbach authored
llvm-svn: 115890
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Jim Grosbach authored
llvm-svn: 115884
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Jim Grosbach authored
llvm-svn: 115860
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Jason W Kim authored
Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute() Added ARMAsmPrinter::emitAttributes() (plural s). TODO: .cpu attribute needs to be refactored llvm-svn: 115859
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Jim Grosbach authored
llvm-svn: 115853
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- Oct 06, 2010
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Jim Grosbach authored
llvm-svn: 115845
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Jim Grosbach authored
"lane" operand modifier. llvm-svn: 115843
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Jim Grosbach authored
pseudo instructions. llvm-svn: 115840
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