- Apr 02, 2012
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Benjamin Kramer authored
This way we can get AVX v-prefixed instructions tail merged with the normal insns. llvm-svn: 153869
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Jason Molenda authored
with some archs, tweak the way we update PATH to fix that. llvm-svn: 153868
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Benjamin Kramer authored
All implementations used the same code. llvm-svn: 153866
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Craig Topper authored
Reorder fields in MatchEntry and OperandMatchEntry to reduce padding. A bit tricky due to the target specific sizes for some of the fields so the ordering is only optimal for the targets in the tree. llvm-svn: 153865
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Nadav Rotem authored
Do not try to optimize swizzles of shuffles if the source shuffle has more than a single user, except when the source shuffle is also a swizzle. llvm-svn: 153864
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Craig Topper authored
Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. llvm-svn: 153863
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Eric Christopher authored
Patch by Jeremy Huddleston! llvm-svn: 153862
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Bill Wendling authored
llvm-svn: 153861
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Craig Topper authored
Make MCInstrInfo available to the MCInstPrinter. This will be used to remove getInstructionName and the static data it contains since the same tables are already in MCInstrInfo. llvm-svn: 153860
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Bill Wendling authored
definition for it. In that case, we want to wait for the potential definition before we create a symbol for it. llvm-svn: 153859
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Richard Smith authored
dependent contexts. llvm-svn: 153858
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Craig Topper authored
llvm-svn: 153857
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Howard Hinnant authored
This is an initial commit of constexpr support as proposed by Richard Smith. This by no means completes constexpr support. Indeed, it hardly scratches the surface. All it does is lay the foundation in <__config> and changes those few places in the library that are already using that foundation. llvm-svn: 153856
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Howard Hinnant authored
I believe tuple is still under development in the standard. Daniel Krugler is/will be making convincing arguments that a modified form of LWG 2051 (currently NAD Future) is easily acheivable and desirable. He has demonstrated that a tuple<T...> where all of the T are implicitly convertible from U... should have a tuple constructor that is also implicit, instead of explicit. This would support the use cases in LWG 2051 while not undermining T... with explicit conversions from U.... This check-in is an experimental implementation of Daniel's work. I believe this work to be mature enough to warrant inclusion into libc++. If anyone sees real-world problems that this check in causes, please let me know and I will revert it, and provide the feedback to the LWG. llvm-svn: 153855
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Bob Wilson authored
llvm-gcc doesn't handle --serialize-diagnostics so when compiling i386 kernel/kext code with -Werror, you get an error about that option being unused. Claim the argument to prevent this from breaking builds. <rdar://problem/11161933> llvm-svn: 153854
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Chandler Carruth authored
rather than a bitfield, a great suggestion by Chris during code review. There is still quite a bit of cruft in the interface, but that requires sorting out some awkward uses of the cost inside the actual inliner. No functionality changed intended here. llvm-svn: 153853
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- Apr 01, 2012
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Hal Finkel authored
llvm-svn: 153852
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Hal Finkel authored
llvm-svn: 153851
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Hal Finkel authored
llvm-svn: 153850
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Sebastian Redl authored
llvm-svn: 153849
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Nadav Rotem authored
1. Simplify xor/and/or (bitcast(A), bitcast(B)) -> bitcast(op (A,B)) (and also scalar_to_vector). 2. Xor/and/or are indifferent to the swizzle operation (shuffle of one src). Simplify xor/and/or (shuff(A), shuff(B)) -> shuff(op (A, B)) 3. Optimize swizzles of shuffles: shuff(shuff(x, y), undef) -> shuff(x, y). 4. Fix an X86ISelLowering optimization which was very bitcast-sensitive. Code which was previously compiled to this: movd (%rsi), %xmm0 movdqa .LCPI0_0(%rip), %xmm2 pshufb %xmm2, %xmm0 movd (%rdi), %xmm1 pshufb %xmm2, %xmm1 pxor %xmm0, %xmm1 pshufb .LCPI0_1(%rip), %xmm1 movd %xmm1, (%rdi) ret Now compiles to this: movl (%rsi), %eax xorl %eax, (%rdi) ret llvm-svn: 153848
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Benjamin Kramer authored
Analyzer: Store BugReports directly in a ilist instead of adding another layer of inderection with std::list llvm-svn: 153847
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Lang Hames authored
llvm-svn: 153846
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Hal Finkel authored
The 440 and A2 cores have detailed itineraries, and this allows them to be fully used to maximize throughput. llvm-svn: 153845
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Hal Finkel authored
llvm-svn: 153844
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Hal Finkel authored
Post-RA scheduling gives a significant performance improvement on the embedded cores, so turn it on. Using full anti-dep. breaking is important for FP-intensive blocks, so turn it on (just on the embedded cores for now; this should also be good on the 970s because post-ra scheduling is all that we have for now, but that should have more testing first). llvm-svn: 153843
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Hal Finkel authored
This adds a full itinerary for IBM's PPC64 A2 embedded core. These cores form the basis for the CPUs in the new IBM BG/Q supercomputer. llvm-svn: 153842
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Craig Topper authored
Use SequenceToOffsetTable to create instruction name table. Saves space particularly on X86 where AVX instructions just add a 'v' to the front of other instructions. llvm-svn: 153841
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Tobias Grosser authored
llvm-svn: 153840
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Tobias Grosser authored
llvm-svn: 153839
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Tobias Grosser authored
When deriving new values for the statements of a SCoP, we assumed that parameter values are constant within the SCoP and consquently do not need to be rewritten. For OpenMP code generation this assumption is wrong, as such values are not available in the OpenMP subfunction and consequently also may need to be rewritten. Committed with some changes. Contributed-By:
Johannes Doerfert <s9jodoer@stud.uni-saarland.de> llvm-svn: 153838
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Benjamin Kramer authored
This also avoids emitting the information twice, which led to code bloat. On i386-linux-Release+Asserts with all targets built this change shaves a whopping 1.3 MB off clang. The number is probably exaggerated by recent inliner changes but the methods were already enormous with the old inline cost computation. The DWARF reg -> LLVM reg mapping doesn't seem to have holes in it, so it could be a simple lookup table. I didn't implement that optimization yet to avoid potentially changing functionality. There is still some duplication both in tablegen and the generated code that should be cleaned up eventually. llvm-svn: 153837
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Chandler Carruth authored
As a side note, I really dislike array_pod_sort... Do we really still care about any STL implementations that get this so wrong? Does libc++? llvm-svn: 153834
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Chandler Carruth authored
always-inlining is disabled: recursive functions and indirectbr. llvm-svn: 153833
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Chandler Carruth authored
a single missing character. Somehow, this had gone untested. I've added tests for returns-twice logic specifically with the always-inliner that would have caught this, and fixed the bug. Thanks to Matt for the careful review and spotting this!!! =D llvm-svn: 153832
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Chandler Carruth authored
test and FileCheck. llvm-svn: 153831
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Andrew Trick authored
llvm-svn: 153827
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Eli Bendersky authored
llvm-svn: 153825
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Sean Callanan authored
llvm-svn: 153823
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Sean Callanan authored
JIT that enables paired relocations in the i386 Mach-O JIT. This eliminates crashes in the testsuite when running under i386. llvm-svn: 153822
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