access to bits).  Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling 
(untested, probably does not work).

llvm-svn: 41858

information for EH.

llvm-svn: 41852

of their elements do not yield the same ParamAttrsList,
though they should.  On the other hand, everyone seems
to pass such vectors with elements ordered by increasing
index, so rather than sorting the elements simply assert
that the elements are ordered in this way.

llvm-svn: 41845

nested function.

llvm-svn: 41844

init_trampoline.  There is now only one
trampoline intrinsic.

llvm-svn: 41841

llvm-svn: 41840

that global stub instead of doing the ".set" thingy we were doing before.

llvm-svn: 41838

llvm-svn: 41833

llvm-svn: 41829

llvm-svn: 41826

llvm-svn: 41823

llvm-svn: 41822

llvm-svn: 41821

llvm-svn: 41819

llvm-svn: 41818

llvm-svn: 41817

llvm-svn: 41816

llvm-svn: 41815

llvm-svn: 41812

llvm-svn: 41810

llvm-svn: 41809

llvm-svn: 41808

        cmpl    %eax, %ecx
        setae   %al
        movzbl  %al, %eax

instead of:

        cmpl    %eax, %ecx
        setb    %al
        xorb    $1, %al
        movzbl  %al, %eax

when using logical not of a C comparison.

llvm-svn: 41807

2. Lower calls to fabs and friends to FABS nodes etc unless the function has
   internal linkage.  Before we wouldn't lower if it had a definition, which
   is incorrect.  This allows us to compile:

define double @fabs(double %f) {
        %tmp2 = tail call double @fabs( double %f )
        ret double %tmp2
}

into:

_fabs:
        fabs f1, f1
        blr 

llvm-svn: 41805

llvm-svn: 41804

instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.

llvm-svn: 41802

llvm-svn: 41800

llvm-svn: 41798

llvm-svn: 41792

llvm-svn: 41786

first region, just deallocate all but the last region in the list.

llvm-svn: 41782

registers. The scheduler is now responsible for emitting them.

llvm-svn: 41781

llvm-svn: 41776

by flagging the associated instructions as being trivially rematerializable.

llvm-svn: 41775

llvm-svn: 41774

llvm-svn: 41769

The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.

llvm-svn: 41768

Split eh.select / eh.typeid.for intrinsics into i32/i64 versions. This is needed, because they just "mark" register 
liveins and we let frontend solve type issue, not lowering code :)

llvm-svn: 41763

llvm-svn: 41759

Patch by Sterling Stein!

llvm-svn: 41758