It is possible to have multiple DBG_VALUEs for the same variable:

32L TEST32rr %vreg0<kill>, %vreg0, %EFLAGS<imp-def>; GR32:%vreg0
    DBG_VALUE 2, 0, !"i"
    DBG_VALUE %noreg, %0, !"i"

When that happens, keep the last one instead of the first.

llvm-svn: 136842

llvm-svn: 136840

llvm-svn: 136838

llvm-svn: 136837

This helps generate better code in functions with high register
pressure.

The previous version of compact region splitting caused regressions
because the regions were a bit too large. A stronger negative bias
applied in r136832 fixed this problem.

llvm-svn: 136836

Do not drop undef debug values. These are used as range termination marker by live debug variable pass.

llvm-svn: 136834

llvm-svn: 136833

Apply twice the negative bias on transparent blocks when computing the
compact regions. This excludes loop backedges from the region when only
one of the loop blocks uses the register.

Previously, we would include the backedge in the region if the loop
preheader and the loop latch both used the register, but the loop header
didn't.

When both the header and latch blocks use the register, we still keep it
live on the backedge.

llvm-svn: 136832

lib/CodeGen/RegAllocGreedy.cpp:1176:18: warning: unused variable 'B' [-Wunused-variable]
    if (unsigned B = Cand.getBundles(BundleCand, BestCand)) {
                 ^
lib/CodeGen/RegAllocGreedy.cpp:1188:18: warning: unused variable 'B' [-Wunused-variable]
    if (unsigned B = Cand.getBundles(BundleCand, 0)) {
                 ^

llvm-svn: 136831

llvm-svn: 136828

llvm-svn: 136826

This is some of my original LLVM code. *wipes tear*

llvm-svn: 136821

llvm-svn: 136818

llvm-svn: 136816

llvm-svn: 136814

New approach to r136737: insert the necessary fences for atomic ops in platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.

I think this completes the basic CodeGen for atomicrmw and cmpxchg.

llvm-svn: 136813

llvm-svn: 136811

llvm-svn: 136803

llvm-svn: 136802

Go back to the old definition. It's not clear that a 'resume' can be 'outlined' from the function with the landing pad for all platforms.

llvm-svn: 136799

to notify SCEV of a change. Add forgetLoop in a couple of those places.

llvm-svn: 136797

llvm-svn: 136795

llvm-svn: 136790

This fixes PR10575.

llvm-svn: 136787

llvm-svn: 136771

llvm-svn: 136768

llvm-svn: 136759

  - use SmallVectorImpl& for the function argument.
  - ignore the operands on the GEP, even if they aren't constant! Much as we
    pretend the malloc succeeds, we pretend that malloc + whatever-you-GEP'd-by
    is not null. It's magic!

llvm-svn: 136757

Add this back in for now. There are still a few passes which create unwind instructions at the moment.

llvm-svn: 136756

Don't replace a gep/bitcast with 'undef' because that will form a "free(undef)"
which in turn means "unreachable". What we wanted was a no-op. Instead, analyze
the whole tree and look for all the instructions we need to delete first, then
delete them second, not relying on the use_list to stay consistent.

llvm-svn: 136752

the function, because the UnwindInst is going away.

llvm-svn: 136751

llvm-svn: 136742

This information is not used for anything yet.

llvm-svn: 136741

With a 'FirstDef' field right there, it is very confusing that FirstUse
refers to an instruction that may be a def.

llvm-svn: 136739

llvm-svn: 136738

ARM backend support for atomicrmw and cmpxchg with non-monotonic ordering.  Not especially pretty, but seems to work well enough.  If this looks okay, I'll put together similar patches for Mips, PPC, and Alpha.

llvm-svn: 136737

This is either an invalid SlotIndex, or valno->def for the first value
defined inside the block. PHI values are not counted as defined inside
the block.

The FirstDef field will be used when estimating the cost of spilling
around a block.

llvm-svn: 136736

llvm-svn: 136735

malloc call.

llvm-svn: 136732

The PrefBoth constraint is used for blocks that ideally want a live-in
value both on the stack and in a register. This would be used by a block
that has a use before interference forces a spill.

Secondly, add the ChangesValue flag to BlockConstraint. This tells
SpillPlacement if a live-in value on the stack can be reused as a
live-out stack value for free. If the block redefines the virtual
register, a spill would be required for that.

This extra information will be used by SpillPlacement to more accurately
calculate spill costs when a value can exist both on the stack and in a
register.

The simplest example is a basic block that reads the virtual register,
but doesn't change its value. Spilling around such a block requires a
reload, but no spill in the block.

The spiller already knows this, but the spill placer doesn't. That can
sometimes lead to suboptimal regions.

llvm-svn: 136731