for "thumb" and add a check for V6T2.

llvm-svn: 73905

caller-saved register.

llvm-svn: 73901

Support for .text relocations, implementing TargetELFWriter overloaded methods for x86/x86_64.
Use a map to track global values to their symbol table indexes
Code cleanup and small fixes

llvm-svn: 73894

llvm-svn: 73893

predicate does not check if Thumb mode is enabled, and when in ARM mode
there are still some checks for constant-pool use that need to run.

llvm-svn: 73887

Handle FpSET_ST0_80 being used when ST0 is still alive.

llvm-svn: 73850

llvm-svn: 73841

llvm-svn: 73840

llvm-svn: 73837

llvm-svn: 73836

a global with that gets printed with the :mem modifier.  All operands to lea's 
should be handled with the lea32mem operand kind, and this allows the TLS stuff
to do this.  There are several better ways to do this, but I went for the minimal
change since I can't really test this (beyond make check).

This also makes the use of EBX explicit in the operand list in the 32-bit, 
instead of implicit in the instruction.

llvm-svn: 73834

with MBB's.

llvm-svn: 73830

it as a pcrel immediate instead.  This gets pc-rel weirdness out of the
main printoperand codepath.

llvm-svn: 73829

llvm-svn: 73824

llvm-svn: 73818

LEA64_32r, eliminating a bunch of modifier logic stuff on addr modes.

Implement support for printing mbb labels as operands.

llvm-svn: 73817

llvm-svn: 73815

llvm-svn: 73813

llvm-svn: 73811

step is to make tblgen generate something more appropriate for MCInst,
and generate calls to operand translation routines where needed.
This includes a bunch of #if 0 code which will slowly be refactored into
something sensible.

llvm-svn: 73810

on X86.  Not useful yet.

llvm-svn: 73799

llvm-svn: 73792

llvm-svn: 73791

llvm-svn: 73786

llvm-svn: 73784

llvm-svn: 73781

llvm-svn: 73767

llvm-svn: 73761

handle with an SSE2 instruction.

llvm-svn: 73760

llvm-svn: 73759

Patch by Benedict Gaster.

llvm-svn: 73753

llvm-svn: 73749

Latency information for ARM v6. It's rough and not yet hooked up. Right now  we are only using branch latency to determine if-conversion limits.

llvm-svn: 73747

while experimenting.  I'm reasonably sure this is correct, but please 
tell me if these instructions have some strange property which makes this
change unsafe.

llvm-svn: 73746

llvm-svn: 73744

implementation.  The idea is that we want asmprinting to
work by converting MachineInstrs into a new MCInst class,
then the per-instruction asmprinter works on MCInst.  MCInst
and the new asmprinters will not depend on most of the 
llvm code generators.  This allows building diassemblers
that don't link in the whole llvm code generator.  This is
step #1 of many.

llvm-svn: 73743

into DarwinTargetAsmInfo.cpp.  The remaining differences should
be evaluated.  It seems strange that x86/arm has .zerofill but ppc
doesn't, etc.

llvm-svn: 73742

llvm-svn: 73738

llvm-svn: 73737

llvm-svn: 73736