efficient implementation possible, but it's pretty simple and
good enough for the time being.

llvm-svn: 56504

llvm-svn: 56502

llvm-svn: 56501

track of the number of live registers, which is all the set was
being used for.

llvm-svn: 56498

instruction opcodes are now numbered. No functionality change.

llvm-svn: 56497

llvm-svn: 56496

llvm-svn: 56495

X86ISelDAGToDAG.cpp and into X86InstrInfo.cpp. This will allow
it to be reused by FastISel.

llvm-svn: 56494

    -callgraph => print-callgraph
    -callscc   => print-callgraph-sccs
    -cfgscc    => print-cfg-sccs
    -externalfnconstants => print-externalfnconstants
    -print               => print-function
    -print-alias-sets (no change)
    -print-callgraph     => dot-callgraph
    -print-cfg           => dot-cfg
    -print-cfg-only      => dot-cfg-only
    -print-dom-info (no change)
    -printm              => print-module
    -printusedtypes      => print-used-types

llvm-svn: 56487

llvm-svn: 56486

llvm-svn: 56485

llvm-svn: 56483

llvm-svn: 56481

load address has an offset from the base of the constant pool
entry.

llvm-svn: 56479

llvm-svn: 56478

llvm-svn: 56477

llvm-svn: 56476

llvm-svn: 56475

llvm-svn: 56474

just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges
isn't what StrongPHIElimination wants.

llvm-svn: 56472

default.

llvm-svn: 56471

llvm-svn: 56469

llvm-svn: 56468

llvm-svn: 56467

llvm-svn: 56466

llvm-svn: 56465

llvm-svn: 56464

llvm-svn: 56463

llvm-svn: 56462

llvm-svn: 56461

llvm-svn: 56460

llvm-svn: 56459

llvm-svn: 56458

llvm-svn: 56456

llvm-svn: 56453

(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.

llvm-svn: 56452

Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC.

llvm-svn: 56436

llvm-svn: 56432

add_custom_command with COMMENT. It was forcing unconditional command
execution.

llvm-svn: 56425

llvm-svn: 56419