currently troublesome even for #ifndef NDEBUG builds.

llvm-svn: 58512

completely forgotten about when writing LegalizeTypes.

llvm-svn: 58508

in such cases.

llvm-svn: 58505

callee-saved restore code. It could skip over conditional jumps
accidentally. Instead, just skip the "return" instructions.

llvm-svn: 58489

llvm-svn: 58486

llvm-svn: 58485

data manually extracted from llvm-config.

llvm-svn: 58484

vector element 0 for a store, as it's smaller and faster.

llvm-svn: 58483

Revert errant deletion. The target needs to be able to specify that it doesn't want the generic constant pool to be emitted.

llvm-svn: 58475

llvm-svn: 58474

!!!!!!!!!! Warning !!!!!!!!!!!!!!!
If you already have created a solution with cmake, you will need to manually open to the new one.

llvm-svn: 58461

llvm-svn: 58459

optimizations accordingly.

llvm-svn: 58457

llvm-svn: 58456

type for the shift amount type.  Add a check
that shifts and rotates use the type returned
by getShiftAmountTy for the amount.  This
exposed some problems in CellSPU and PPC,
which have already been fixed.

llvm-svn: 58455

(i32 for PPC, not i8).  Correct this, and some
formatting while there.

llvm-svn: 58451

function.
 - This explicitly models the costs for functions which should
   "always" or "never" be inlined. This fixes bugs where such costs
   were not previously respected.

llvm-svn: 58450

getShiftAmountTy (i32 in the case of CellSPU).

llvm-svn: 58449

llvm-svn: 58443

llvm-svn: 58435

Patch by Jay Foad.

llvm-svn: 58434

llvm-svn: 58433

One will only see an effect if legalizetype is not active.  Will move
support to LegalizeType soon.

llvm-svn: 58426

llvm-svn: 58416

so that va_start/va_arg/et.al. will walk arguments correctly for Cell SPU.

N.B.: Because neither clang nor llvm-gcc-4.2 can be built for CellSPU, this is
still unexorcised code.

llvm-svn: 58415

llvm-svn: 58414

llvm-svn: 58413

"__STDC_CONSTANT_MACROS" needs to be #defined first.

llvm-svn: 58411

llvm-svn: 58409

llvm-svn: 58408

llvm-svn: 58407

llvm-svn: 58406

Add a bit to MachineRelocation that tells JIT that target is responsible for resolving the address. e.g. ARM constpool.

llvm-svn: 58405

llvm-svn: 58403

llvm-svn: 58393

allows ppcf128->int conversion to work with
DeadInstructionElimination.  This is now turned
off but RM is harmless.  It does not do a complete
job of modeling the rounding mode.

Revert marking MFCR as using all 7 CR subregisters;
while correct, this caused the problem in PR 2964,
plus the local RA crash noted in the comments.
This was needed to make DeadInstructionElimination,
but as we are not running that, it is backed out
for now.  Eventually it should go back in and the
other problems fixed where they're broken.

llvm-svn: 58391

llvm-svn: 58389

llvm-svn: 58386

I don't really see this as being needed, but there is little harm from doing
it.

llvm-svn: 58385

llvm-svn: 58384