llvm-svn: 36618

are done with them, start implementing ParseFunctionBody

llvm-svn: 36617

llvm-svn: 36616

llvm-svn: 36615

llvm-svn: 36614

llvm-svn: 36613

llvm-svn: 36612

llvm-svn: 36611

llvm-svn: 36610

llvm-svn: 36609

llvm-svn: 36608

argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.

llvm-svn: 36607

included as part of the stack frame.

llvm-svn: 36606

llvm-svn: 36605

  produce two results.)
* Do not touch volatile loads.

llvm-svn: 36604

llvm-svn: 36603

llvm-svn: 36602

llvm-svn: 36601

llvm-svn: 36600

register, preallocate all input registers and the early clobbered output.

This fixes PR1357 and CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll

llvm-svn: 36599

llvm-svn: 36598

llvm-svn: 36597

llvm-svn: 36596

llvm-svn: 36594

pieces of it.  No functionality change.

llvm-svn: 36592

llvm-svn: 36590

        # InlineAsm Start
        subfc r3,r5,r4
                subfze r4,r3
        # InlineAsm End

print:

        # InlineAsm Start
        subfc r3,r5,r4
        subfze r4,r3
        # InlineAsm End

llvm-svn: 36589

llvm-svn: 36588

Rearrange some tests so that if PowerPC is not being built we don't try to
run PowerPC specific tests.

llvm-svn: 36587

llvm-svn: 36586

llvm-svn: 36585

that it is native so that the linker will pass it on downstream. This avoids
a problem where the native link line fails because there is both a .so and
a .a file. The .a file gets processed as bytecode and then dropped from the
command line.

llvm-svn: 36584

llvm-svn: 36583

llvm-svn: 36582

llvm-svn: 36581

llvm-svn: 36580

<MODULE_BLOCK NumWords=27 BlockCodeSize=3>
  <TYPE_BLOCK NumWords=7 BlockCodeSize=4>
    <NUMENTRY op0=7>
    <POINTER op0=1>
    <FUNCTION op0=0 op1=2 op2=2 op3=2 op4=2>
    <VECTOR op0=2 op1=3>
    <INTEGER op0=64>
    <VECTOR op0=8 op1=5>
    <INTEGER op0=16>
    <VOID>
...

With work, the operands can be pretty printed symbolically.

llvm-svn: 36579

visibility support for bitcode.

llvm-svn: 36577

llvm-svn: 36576

llvm-svn: 36575