operands into their own PrintMethod, in order not to pollute the printOperand()
impl with disassembly only Imm modifiers.

llvm-svn: 98172

what fields of the CPSR or SPSR are affected.

llvm-svn: 98085

immediate instructions cannot set the condition codes, so they do not have
the extra cc_out operand.  We hit an assertion during tail duplication
because the instruction being duplicated had more operands that expected.

llvm-svn: 98001

llvm-svn: 97776

of either sxtb16 or uxtb16, and the unified syntax does not specify ".w".

llvm-svn: 97760

Instruction (PLI) for disassembly only.

According to A8.6.120 PLI (immediate, literal), for example, different
instructions are generated for "pli [pc, #0]" and "pli [pc, #-0"].  The
disassembler solves it by mapping -0 (negative zero) to -1, -1 to -2, ..., etc.

llvm-svn: 97731

and STRHT for disassembly only.

llvm-svn: 97655

for disassembly only.

llvm-svn: 97632

llvm-svn: 97617

disassembly only.

llvm-svn: 97614

llvm-svn: 97595

the opc string passed in, since it's a given from the class inheritance of T2sI.
The fixed the extra 's' in adcss & sbcss when disassembly printing.

llvm-svn: 97582

SMMULR, SMMLAR, SMMLSR, TBB, TBH, and 16-bit Thumb instruction CPS for
disassembly only.

llvm-svn: 97573

Add printMandatoryPredicateOperand() PrintMethod for IT predicate printing.

Ref: A8.3 Conditional execution
llvm-svn: 97571

llvm-svn: 97348

o Parallel addition and subtraction, signed/unsigned
o Miscellaneous operations: QADD, QDADD, QSUB, QDSUB
o Unsigned sum of absolute differences [and accumulate]: USAD8, USADA8
o Signed/Unsigned saturate: SSAT, SSAT16, USAT, USAT16
o Signed multiply accumulate long (halfwords): SMLAL<x><y>
o Signed multiply accumulate/subtract [long] (dual): SMLAD[x], SMLALD[X], SMLSD[X], SMLSLD[X]
o Signed dual multiply add/subtract [long]: SMUAD[X], SMUSD[X]

llvm-svn: 97276

and SRS.

llvm-svn: 97164

llvm-svn: 97163

llvm-svn: 97159

llvm-svn: 96393

llvm-svn: 96388

to have the predicate on the pattern itself instead. Support for the new
ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are
no longer used anywhere.

llvm-svn: 96384

llvm-svn: 95603

llvm-svn: 95112

cannot be directly interchanged for comparisons against negated values.
Disable the CMN instructions for the time being.

llvm-svn: 94119

Fix r93758. Use isel patterns instead of c++ selection code to select rbit and make sure we pick different instructions for ARM vs. Thumb2.

llvm-svn: 93829

"On ARMv6T2 this turns cttz into rbit, clz instead of the 4 instruction
 sequence it is now."

llvm-svn: 93758

T2I_bin_ii12rs definition.

llvm-svn: 93006

llvm-svn: 92796

instructions.  Thumb does not have the restriction that t2 = t+1.

llvm-svn: 92785

llvm-svn: 91555

bytes of Inst to 0x0000 for the benefit of the Thumb decoder.

llvm-svn: 91496

llvm-svn: 91434

llvm-svn: 91329

llvm-svn: 91313

llvm-svn: 91310

than doing the same via constpool:
1. Load from constpool costs 3 cycles on A9, movt/movw pair - just 2.
2. Load from constpool might stall up to 300 cycles due to cache miss.
3. Movt/movw does not use load/store unit.
4. Less constpool entries => better compiler performance.

This is only enabled on ELF systems, since darwin does not have needed
relocations (yet).

llvm-svn: 89720

llvm-svn: 89718

fold immediate of a + Const into the user as a subtract if it can fit as a negated two-part immediate.

llvm-svn: 89694

llvm-svn: 89478