Old code would only update physreg live intervals.

llvm-svn: 158881

llvm-svn: 158880

Live intervals for regunits and virtual registers are stored separately,
and physreg live intervals are going away.

To visit the live ranges of all virtual registers, use this pattern
instead:

  for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
    unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
    if (MRI->reg_nodbg_empty(Reg))
      continue;

llvm-svn: 158879

llvm-svn: 158878

llvm-svn: 158877

I don't think anyone has been using this functionality for a while, and
it is getting in the way of refactoring now.

llvm-svn: 158876

Register allocators depend on it being permanently enabled now.

llvm-svn: 158873

Deterministically enumerate the virtual registers instead.

llvm-svn: 158872

They are living in LiveRegMatrix now.

llvm-svn: 158868

Stop depending on the LiveIntervalUnions in RegAllocBase, they are about
to be removed.

The changes are mostly replacing register alias iterators with regunit
iterators, and querying LiveRegMatrix instrad of RegAllocBase.

InterferenceCache is converted to work with per-regunit
LiveIntervalUnions, and it checks fixed regunit interference separately,
using the fixed live intervals provided by LiveIntervalAnalysis.

The local splitting helper calcGapWeights() is also considering fixed
regunit interference which is kept on the side now.

llvm-svn: 158867

Stop using the LiveIntervalUnions provided by RegAllocBase, they will be
removed soon.

llvm-svn: 158866

Soon we won't need to compute live intervals for physical registers.

llvm-svn: 158865

Filter out physreg candidates with regunit interferrence.
Also compute regmask interference more efficiently.

llvm-svn: 158864

As Nadav pointed out the first implementation was obscure.

llvm-svn: 158862

llvm-svn: 158858

That is a DenseMap iterator keyed by pointers, so the iteration order is
nondeterministic.

I would like to replace the DenseMap with an IndexedMap which doesn't
allow iteration.

llvm-svn: 158856

llvm-svn: 158855

that are generated by TableGen and are already available in
MipsGenRegisterInfo.inc. Suggested by Jakob Stoklund Olesen.

Also, fix bug in function DecodeAFGR64RegisterClass.

Patch by Vladimir Medic. 

llvm-svn: 158846

llvm-svn: 158844

llvm-svn: 158841

This is supported by gcc and clang, but guarded by a macro for MSVC 2008.

The extern template declaration is not necessary but generally good
form. It can avoid extra instantiations of the template methods
defined inline.

The EXTERN_TEMPLATE_INSTANTIATION macro could probably be generalized to
handle multiple template parameters if someone thinks it's worthwhile.

llvm-svn: 158840

Add users of a MERGE_VALUE node to the worklist to process again when the node is removed.  Sorry, no test case.  Foudn it by inspection of the code

llvm-svn: 158839

Regunit live ranges are computed on demand, so when mi-sched calls
handleMove, some regunits may not have live ranges yet.

That makes updating them easier: Just skip the non-existing ranges. They
will be computed correctly from the rescheduled machine code when they
are needed.

llvm-svn: 158831

replace usage of EmitGEPOffset() with TargetData::getIndexedOffset() when the GEP offset is known to be constant.
With this change, we avoid relying on the IR Builder to constant fold the operations.

No functionality change intended.

llvm-svn: 158829

llvm-svn: 158827

llvm-svn: 158823

The test case for this will come with the PPC indexed preinc loads commit.

llvm-svn: 158822

llvm-svn: 158820

llvm-svn: 158819

llvm-svn: 158818

llvm-svn: 158817

llvm-svn: 158816

llvm-svn: 158815

llvm-svn: 158814

llvm-svn: 158813

llvm-svn: 158810

llvm-svn: 158808

llvm-svn: 158806

llvm-svn: 158805

llvm-svn: 158804