Commits · 28c5b8618a58a8fdc7a7f2505a7aa367b35fc129 · Roger Ferrer / llvm-epi-0.8

Jan 12, 2007
- Don't add or sub zero to sp. · 901d9e65
  Lauro Ramos Venancio authored Jan 12, 2007
```
llvm-svn: 33142
```
  901d9e65
- Build constants using instructions mov/orr or mvn/eor. · c4235e55
  Lauro Ramos Venancio authored Jan 12, 2007
```
llvm-svn: 33141
```
  c4235e55
Jan 02, 2007
- Fix naming inconsistency. · 74b46e8c
  Evan Cheng authored Jan 02, 2007
```
llvm-svn: 32823
```
  74b46e8c
Dec 18, 2006
- macros -> Inline functions · 3ab9256d
  Rafael Espindola authored Dec 18, 2006
```
Lauros's patch

llvm-svn: 32656
```
  3ab9256d
Dec 14, 2006
- Avoid creating invalid sub/add instructions on the prolog/epilog · 09e2921d
  Rafael Espindola authored Dec 14, 2006
```
patch by Lauro

llvm-svn: 32577
```
  09e2921d
Dec 07, 2006
- What should be the last unnecessary <iostream>s in the library. · 9bfb1e1f
  Bill Wendling authored Dec 07, 2006
```
llvm-svn: 32333
```
  9bfb1e1f
Nov 28, 2006
- Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead · 20350c40
  Evan Cheng authored Nov 27, 2006
```
of opcode and number of operands.

llvm-svn: 31947
```
  20350c40
Nov 09, 2006
- implement load effective address similar to the alpha backend · 5f7ab1b9
  Rafael Espindola authored Nov 09, 2006
```
remove lea_addri and the now unused memri addressing mode

llvm-svn: 31592
```
  5f7ab1b9
Nov 08, 2006
- initial implementation of addressing mode 2 · 708cb605
  Rafael Espindola authored Nov 08, 2006
```
TODO: fix lea_addri

llvm-svn: 31552
```
  708cb605
Oct 31, 2006
- add support for calling functions when the caller has variable sized objects · 4e825336
  Rafael Espindola authored Oct 31, 2006
```
llvm-svn: 31312
```
  4e825336
Oct 26, 2006
- initial support for frame pointers · a23166d6
  Rafael Espindola authored Oct 26, 2006
```
llvm-svn: 31197
```
  a23166d6
Oct 17, 2006
- add the immediate to the Offset in eliminateFrameIndex · feb50708
  Rafael Espindola authored Oct 17, 2006
```
llvm-svn: 30998
```
  feb50708
- add FCPYS and FCPYD · c31ee949
  Rafael Espindola authored Oct 17, 2006
```
llvm-svn: 30995
```
  c31ee949
Oct 06, 2006
- fix the stack alignment · 6024ea83
  Rafael Espindola authored Oct 06, 2006
```
llvm-svn: 30766
```
  6024ea83
Sep 13, 2006
- add shifts to addressing mode 1 · 3130a756
  Rafael Espindola authored Sep 13, 2006
```
llvm-svn: 30291
```
  3130a756
Sep 11, 2006
- partial implementation of the ARM Addressing Mode 1 · e45a79a9
  Rafael Espindola authored Sep 11, 2006
```
llvm-svn: 30252
```
  e45a79a9
Sep 05, 2006
- Completely eliminate def&use operands. Now a register operand is EITHER a · af23f9b5
  Chris Lattner authored Sep 05, 2006
```
def operand or a use operand.

llvm-svn: 30109
```
  af23f9b5
Aug 17, 2006
- add a "load effective address" · c3ed77e1
  Rafael Espindola authored Aug 17, 2006
```
llvm-svn: 29748
```
  c3ed77e1
Aug 16, 2006

Declare the callee saved regs · bf8e7514

Rafael Espindola authored Aug 16, 2006

Remove the hard coded store and load of the link register
Implement ARMFrameInfo

llvm-svn: 29727

bf8e7514

Aug 09, 2006
- correctly set LocalAreaOffset of TargetFrameInfo · 1c41fc9b
  Rafael Espindola authored Aug 09, 2006
```
llvm-svn: 29589
```
  1c41fc9b
- fix the spill code · f5ce4755
  Rafael Espindola authored Aug 09, 2006
```
llvm-svn: 29583
```
  f5ce4755
- fix the loading of the link register in emitepilogue · 58159b36
  Rafael Espindola authored Aug 09, 2006
```
llvm-svn: 29580
```
  58159b36
Aug 08, 2006
- change the addressing mode of the str instruction to reg+imm · 8c41f99e
  Rafael Espindola authored Aug 08, 2006
```
llvm-svn: 29571
```
  8c41f99e
- initial support for variable number of arguments · 39083e78
  Rafael Espindola authored Aug 08, 2006
```
llvm-svn: 29567
```
  39083e78
Jul 21, 2006

implemented sub · 976c93a1

Rafael Espindola authored Jul 21, 2006

correctly update the stack pointer in the prologue and epilogue

llvm-svn: 29244

976c93a1

Jul 18, 2006
- initial prologue and epilogue implementation. Need to define add and sub before finishing it :-) · bf3a17cd
  Rafael Espindola authored Jul 18, 2006
```
llvm-svn: 29175
```
  bf3a17cd
Jul 11, 2006

add the memri memory operand · 185c5c2b

Rafael Espindola authored Jul 11, 2006

this makes it possible for ldr instructions with non-zero immediate

llvm-svn: 29103

185c5c2b

Jul 10, 2006

create the raddr addressing mode that matches any register and the frame index · e40a7e2a

Rafael Espindola authored Jul 10, 2006

use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot

llvm-svn: 29079

e40a7e2a

Jun 27, 2006
- handle the "mov reg1, reg2" case in isMoveInstr · f6f5aff0
  Rafael Espindola authored Jun 27, 2006
```
llvm-svn: 28945
```
  f6f5aff0
Jun 18, 2006
- initial implementation of ARMRegisterInfo::eliminateFrameIndex · a88966fd
  Rafael Espindola authored Jun 18, 2006
```
fixes test/Regression/CodeGen/ARM/ret_arg5.ll

llvm-svn: 28854
```
  a88966fd
May 18, 2006
- implement movri · b15597b5
  Rafael Espindola authored May 18, 2006
```
add a stub LowerFORMAL_ARGUMENTS

llvm-svn: 28388
```
  b15597b5
- getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. · 305c4957
  Evan Cheng authored May 18, 2006
```
llvm-svn: 28378
```
  305c4957
May 15, 2006
- added a skeleton of the ARM backend · ffdc24b8
  Rafael Espindola authored May 14, 2006
```
llvm-svn: 28301
```
  ffdc24b8