- Jun 19, 2010
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Dan Gohman authored
llvm-svn: 106395
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Benjamin Kramer authored
llvm-svn: 106390
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Dan Gohman authored
assuming that loops are in canonical form, as ScalarEvolution doesn't depend on LoopSimplify itself. Also, with indirectbr not all loops can be simplified. This fixes PR7416. llvm-svn: 106389
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Dan Gohman authored
a helper function. llvm-svn: 106388
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Bob Wilson authored
llvm-svn: 106383
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Bob Wilson authored
llvm-svn: 106382
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Bob Wilson authored
llvm-svn: 106381
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Bruno Cardoso Lopes authored
llvm-svn: 106375
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Bruno Cardoso Lopes authored
AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions. llvm-svn: 106374
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Evan Cheng authored
llvm-svn: 106373
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Bruno Cardoso Lopes authored
llvm-svn: 106372
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Bruno Cardoso Lopes authored
llvm-svn: 106371
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Bruno Cardoso Lopes authored
llvm-svn: 106370
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Evan Cheng authored
Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emitEpilogue is not expecting them. llvm-svn: 106368
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Eric Christopher authored
and operand renaming to help. The giant turn the constraints on and selectively turn it off should probably be inverted at some point since it's just largely 50/50. llvm-svn: 106367
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Bruno Cardoso Lopes authored
llvm-svn: 106366
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Chris Lattner authored
llvm-svn: 106365
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rdar://7873482Chris Lattner authored
segment prefixes. Daniel wrote most of this patch. llvm-svn: 106364
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Evan Cheng authored
llvm-svn: 106362
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Bruno Cardoso Lopes authored
llvm-svn: 106361
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Dan Gohman authored
llvm-svn: 106360
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Bruno Cardoso Lopes authored
llvm-svn: 106359
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Eric Christopher authored
llvm-svn: 106358
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Bruno Cardoso Lopes authored
llvm-svn: 106357
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Eric Christopher authored
llvm-svn: 106356
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Evan Cheng authored
llvm-svn: 106355
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Dan Gohman authored
on calls and similar instructions. llvm-svn: 106353
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Bruno Cardoso Lopes authored
llvm-svn: 106349
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Evan Cheng authored
llvm-svn: 106348
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Evan Cheng authored
llvm-svn: 106347
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Jakob Stoklund Olesen authored
the inserted INSERT_SUBREGs after us. llvm-svn: 106345
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Evan Cheng authored
- This fixed a number of bugs in if-converter, tail merging, and post-allocation scheduler. If-converter now runs branch folding / tail merging first to maximize if-conversion opportunities. - Also changed the t2IT instruction slightly. It now defines the ITSTATE register which is read by instructions in the IT block. - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't change the instruction ordering in the IT block (since IT mask has been finalized). It also ensures no other instructions can be scheduled between instructions in the IT block. This is not yet enabled. llvm-svn: 106344
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Jim Grosbach authored
llvm-svn: 106342
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Eric Christopher authored
llvm-svn: 106340
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Jim Grosbach authored
llvm-svn: 106336
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Eric Christopher authored
llvm-svn: 106335
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Jakob Stoklund Olesen authored
instructions, but it doesn't really understand live ranges, so the first INSERT_SUBREG uses an implicitly defined register. Fix it in LiveVariableAnalysis by adding the <undef> flag. llvm-svn: 106333
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Evan Cheng authored
llvm-svn: 106330
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Bruno Cardoso Lopes authored
llvm-svn: 106327
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Evan Cheng authored
llvm-svn: 106324
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