llvm-svn: 134671

llvm-svn: 134668

Fixes PR9602!

llvm-svn: 134665

processor supports it just fine.

Fixes PR9675 and rdar://9740801

llvm-svn: 134664

llvm-svn: 134661

Part of PR10299 and rdar://9740322

llvm-svn: 134653

Fixes PR10149 and rdar://9738585

llvm-svn: 134648

llvm-svn: 134645

llvm-svn: 134641

llvm-svn: 134640

based on a modifier, split it into two functions.

llvm-svn: 134637

llvm-svn: 134633

llvm-svn: 134630

llvm-svn: 134629

llvm-svn: 134628

llvm-svn: 134627

llvm-svn: 134626

before the offset. This change will enable simplification of function
MipsRegisterInfo::eliminateFrameIndex.

llvm-svn: 134625

llvm-svn: 134622

llvm-svn: 134616

llvm-svn: 134614

multiply-accumulate instructions with separate rounding steps.

llvm-svn: 134609

llvm-svn: 134608

llvm-svn: 134606

llvm-svn: 134595

Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.

llvm-svn: 134590

llvm-svn: 134577

Factor ARM triple parsing out of ARMSubtarget. Another step towards making ARM subtarget info available to MC.

llvm-svn: 134569

llvm-svn: 134547

llvm-svn: 134546

This allows us to remove the (bogus and unneeded) encoding information from
the pseudo-instruction class definitions. All of the pseudos that haven't
been converted yet and still need encoding information instance from the normal
instruction classes and explicitly set isCodeGenOnly, and so are distinct
from this change.

llvm-svn: 134540

Pseudo-instructions don't have encoding information, as they're lowered
to real instructions by the time we're doing binary encoding.

llvm-svn: 134533

llvm-svn: 134527

llvm-svn: 134525

push with a small constant produces a 2-byte push.

llvm-svn: 134501

llvm-svn: 134457

Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, use proper aliases for the pclmullqlqdq and friends. PR10269.

llvm-svn: 134424

If the function allocates reserved stack space for callee argument frames,
estimateStackSize() needs to account for that, as it doesn't show up as
ordinary frame objects. Otherwise, a callee with a large argument list will
throw off the calculations for whether to allocate an emergency spill slot
and we get assert() failures in the register scavenger.

rdar://9715469

llvm-svn: 134415

Noticed by Benjamin Kramer!

llvm-svn: 134376

This is what both the ABI and clang says.

llvm-svn: 134367