Commits · 2a054b4475fa058e3210d3ca70126c851fa74cd5 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Dec 27, 2012
- On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized · 2a054b44
  Nadav Rotem authored Dec 27, 2012
  2a054b44
- [asan] enable alloc_dealloc_mismatch by default · 1302e8d6
  Kostya Serebryany authored Dec 27, 2012
  1302e8d6
- AVX/AVX2: Move the code that lowers vector-trunc from a DAGCo-hook to custom lowering hook. · 8e5d80eb
  Nadav Rotem authored Dec 27, 2012
  8e5d80eb
- [asan] relax asan/lit_tests/malloc_delete_mismatch.cc to make it pass on Mac... · 4a0d946a
  Kostya Serebryany authored Dec 27, 2012
  4a0d946a
- [asan/tsan] when unmapping a chunk of user memory, apply... · 6f604b50
  Kostya Serebryany authored Dec 27, 2012
  6f604b50
- Add hasSideEffects=0 to some forms of ROUND, RCP, and RSQRT. · 757f3fc3
  Craig Topper authored Dec 27, 2012
  757f3fc3
- Refactor DAGCombinerInfo. Change the different booleans that indicate if we... · b1dd5245
  Nadav Rotem authored Dec 27, 2012
  b1dd5245
- Move single letter 'P' prefix out of multiclass now that tablegen allows defm... · 09ce4b9e
  Craig Topper authored Dec 27, 2012
  09ce4b9e
- Update tablegen parser to allow defm names to start with #NAME. · 8f0b7394
  Craig Topper authored Dec 27, 2012
  8f0b7394
- Implement dcl.link paragraph 5. · cffa95d7
  Rafael Espindola authored Dec 27, 2012
  cffa95d7
- Add hasSideEffects=0 to some shift and rotate instructions. None of which are... · 396cb795
  Craig Topper authored Dec 27, 2012
  396cb795
- Mark the divide instructions as hasSideEffects=0. · c7910828
  Craig Topper authored Dec 27, 2012
  c7910828
- add Changes to ELF Writer to layout sections/segments in the output executable · 495d38bf
  Shankar Easwaran authored Dec 27, 2012
  495d38bf
- Update test for backend change. · a487035c
  Eric Christopher authored Dec 27, 2012
  a487035c
- For the dwarf5 split debug info code split out the string section · 3bf29fda
  Eric Christopher authored Dec 27, 2012
  3bf29fda
- FileCheck-ize. · c8a88ee6
  Eric Christopher authored Dec 27, 2012
  c8a88ee6
- FileCheck-ize. · d6152aab
  Eric Christopher authored Dec 27, 2012
  d6152aab
- Add hasSideEffects=0 to CMP*rr_REV. · 5b807aaa
  Craig Topper authored Dec 27, 2012
  5b807aaa
- whitespace · b3f6751d
  Nadav Rotem authored Dec 27, 2012
  b3f6751d
- Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC instructions.... · 89e86077
  Craig Topper authored Dec 27, 2012
  89e86077
- changes for the ELF Reader : split up into AtomsELF.h/Adding new permissions permRWX · bbf9ddda
  Shankar Easwaran authored Dec 27, 2012
  bbf9ddda
- Right now all of the relocations are 32-bit dwarf, and the relocation · 5a6acfa4
  Eric Christopher authored Dec 27, 2012
  5a6acfa4
- changes to fix Hexagon Relocation so that it accounts for the bitmask properly... · b3cb257b
  Shankar Easwaran authored Dec 27, 2012
  b3cb257b
- If all of the write objects are identified then we can vectorize the loop even... · 5350cd31
  Nadav Rotem authored Dec 26, 2012
  5350cd31
- Fix operands and encoding form for ARPL instruction. Register form had and ... · c5573439
  Craig Topper authored Dec 26, 2012
  c5573439
- Add hasSideEffects=0 to some atomic instructions. · d47a70de
  Craig Topper authored Dec 26, 2012
  d47a70de
Dec 26, 2012
- Mark the AL/AX/EAX forms of the basic arithmetic operations has never having side effects. · af237208
  Craig Topper authored Dec 26, 2012
  af237208
- 80 columns. No functionality change. · fca2acb6
  Nick Lewycky authored Dec 26, 2012
  fca2acb6
- Remove mid-optimizer warning. This situation should be handled differently, · 90053a12
  Nick Lewycky authored Dec 26, 2012
  90053a12
- Mark all the _REV instructions as not having side effects. They aren't really... · 1b8c0750
  Craig Topper authored Dec 26, 2012
  1b8c0750
- Remove a special conditional setting of neverHasSideEffects if the instruction... · 18f2675e
  Craig Topper authored Dec 26, 2012
  18f2675e
- Update the docs with the new workload that was added. · 0bbf81e3
  Nadav Rotem authored Dec 26, 2012
  0bbf81e3
- LoopVectorizer: Optimize the vectorization of consecutive memory access when... · 3f7c4f36
  Nadav Rotem authored Dec 26, 2012
  3f7c4f36
- Fix comment typo · 8d5f8dc4
  Eli Bendersky authored Dec 26, 2012
  8d5f8dc4
- [ASan] Teach ASan to print demangled function name when describing stack frame · d66b12b7
  Alexey Samsonov authored Dec 26, 2012
  d66b12b7
- [asan] asan_allocator2: do not align the requested size to the redzone size... · 390cf94f
  Kostya Serebryany authored Dec 26, 2012
  390cf94f
- [msan] Raise alignment of origin stores/loads when possible. · 5eb5bf8b
  Evgeniy Stepanov authored Dec 26, 2012
  5eb5bf8b
- [msan] Expand the file comment with track-origins info. · d8be0c51
  Evgeniy Stepanov authored Dec 26, 2012
  d8be0c51
- Fix quoting in configure. Patch by Krzysztof Parzyszek! · d14720dc
  Benjamin Kramer authored Dec 26, 2012
  d14720dc
- [asan] asan_allocator2: implement adaptive redzones. Now with asan_allocator2... · 35cc7587
  Kostya Serebryany authored Dec 26, 2012
  35cc7587