llvm-svn: 62304

For example, PIC16 needs to break a long or int constant into mulitple parts and emit multiple directives. So Allow targets to overried EmitConstantValueOnly().

llvm-svn: 62301

llvm-svn: 62299

llvm-svn: 62298

Clean up previous cast optimization a bit. Also make zext elimination a bit more aggressive: if it's not necessary to emit an AND (i.e. high bits are already zero), it's profitable to evaluate the operand at a different type.

llvm-svn: 62297

adding more information to the temporary variables names so that
they don't conflict.

llvm-svn: 62296

llvm-svn: 62294

a new toy hazard recognizier heuristic which attempts to direct the
scheduler to avoid clumping large groups of loads or stores too densely.

llvm-svn: 62291

llvm-svn: 62288

Validate dbg_* intrinsics before lowering them.

llvm-svn: 62286

llvm-svn: 62285

to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.

llvm-svn: 62284

loops, hoisting instructions all the way out in one step rather
than hoisting them one nest level at a time. Also, make a few
other code simplifications. This speeds up MachineLICM
by several fold.

llvm-svn: 62283

llvm-svn: 62282

llvm-svn: 62281

llvm-svn: 62279

llvm-svn: 62276

and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.

llvm-svn: 62275

llvm-svn: 62272

this fixes PR3332

llvm-svn: 62271

Use light weight DebugInfo object directly.

llvm-svn: 62269

llvm-svn: 62267

previous commit.

llvm-svn: 62266

llvm-svn: 62265

llvm-svn: 62264

- Looking at the number of sign bits of the a sext instruction to determine  whether new trunc + sext pair should be added when its source is being evaluated in a different type.

llvm-svn: 62263

llvm-svn: 62262

llvm-svn: 62260

llvm-svn: 62259

the ADDRspii addressing mode.

llvm-svn: 62258

changes in the last commit.

llvm-svn: 62257

llvm-svn: 62256

  sequences in SPUDAGToDAGISel.cpp and SPU64InstrInfo.td, killing custom
  DAG node types as needed.
- i64 mul is now a legal instruction, but emits an instruction sequence
  that stretches tblgen and the imagination, as well as violating laws of
  several small countries and most southern US states (just kidding, but
  looking at a function with 80+ parameters is really weird and just plain
  wrong.)
- Update tests as needed.

llvm-svn: 62254

llvm-svn: 62251

llvm-svn: 62249

llvm-svn: 62244

llvm-svn: 62243

frame index. eliminateFrameIndex will replace these instructions with
(LDWSP|STWSP|LDAWSP) or (LDW|STW|LDAWF) if a frame pointer is in use.

This fixes PR 3324. Previously we used LDWSP, STWSP, LDAWSP before frame
pointer elimination. However since they were marked as implicitly using
SP they could not be rematerialised.

llvm-svn: 62238

llvm-svn: 62236

llvm-svn: 62232