directives, allowing things like this:

def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;

Move the rest of the X86 MnemonicAliases over to the .td file.

llvm-svn: 117830

llvm-svn: 117828

with a useful error message instead of having tblgen explode with an 
assert.

llvm-svn: 117827

inline into MatchInstructionImpl.

llvm-svn: 117826

llvm-svn: 117824

llvm-svn: 117823

llvm-svn: 117822

llvm-svn: 117821

for shl.  Caught by inspection.

llvm-svn: 117820

llvm-svn: 117819

llvm-svn: 117818

llvm-svn: 117817

llvm-svn: 117816

just remaps one mnemonic to another.  Convert a few of the X86 aliases
from .cpp to .td code.

llvm-svn: 117815

llvm-svn: 117803

it claiming not to have side-effects is no longer needed.

llvm-svn: 117789

feature lists for instruction pattern predicates.

llvm-svn: 117788

llvm-svn: 117787

llvm-svn: 117785

llvm-svn: 117784

consider it to be readonly.  In fact, don't even consider it to be
readonly if it does a volatile load from an AllocaInst either (it
is debatable as to whether readonly would be correct or not in this
case; play safe for the moment).  This fixes PR8279.

llvm-svn: 117783

llvm-svn: 117782

PR8423, patch by nobled.

llvm-svn: 117774

llvm-svn: 117773

llvm-svn: 117771

llvm-svn: 117769

llvm-svn: 117766

llvm-svn: 117765

a basic block.

llvm-svn: 117764

elsewhere.

llvm-svn: 117763

llvm-svn: 117762

llvm-svn: 117761

There were a number of issues to fix up here:
* The "device" argument of the llvm.memory.barrier intrinsic should be
used to distinguish the "Full System" domain from the "Inner Shareable"
domain.  It has nothing to do with using DMB vs. DSB instructions.
* The compiler should never need to emit DSB instructions.  Remove the
ARMISD::SYNCBARRIER node and also remove the instruction patterns for DSB.
* Merge the separate DMB/DSB instructions for options only used for the
disassembler with the default DMB/DSB instructions.  Add the default
"full system" option ARM_MB::SY to the ARM_MB::MemBOpt enum.
* Add a separate ARMISD::MEMBARRIER_MCR node for subtargets that implement
a data memory barrier using the MCR instruction.
* Fix up encodings for these instructions (except MCR).
I also updated the tests and added a few new ones to check for DMB options
that were not currently being exercised.

llvm-svn: 117756

Update the cmake and autoconf build system to compile polly
as a shared library if it is checked out into tools/polly. In case
polly is not checked out, nothing changes.
This models the way clang can be added to llvm if checked out to tools/clang.

Also rebuild configure.

Patch contributed by ether.

llvm-svn: 117755

llvm-svn: 117753

conditional. Check for those instructions explicitly.

llvm-svn: 117747

llvm-svn: 117746

llvm-svn: 117745

llvm-svn: 117742

llvm-svn: 117741