- Feb 01, 2013
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Jyotsna Verma authored
llvm-svn: 174193
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Jyotsna Verma authored
llvm-svn: 174186
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Tim Northover authored
This should fix a warning when building this backend. llvm-svn: 174177
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Chandler Carruth authored
infrastructure on MCStreamer to test for whether there is an MCELFStreamer object available. This is just a cleanup on the AsmPrinter side of things, moving ad-hoc tests of random APIs to a direct type query. But the AsmParser completely broken. There were no tests, it just blindly cast its streamer to an MCELFStreamer and started manipulating it. I don't have a test case -- this actually failed on LLVM's own regression test suite. Unfortunately the failure only appears when the stars, compilers, and runtime align to misbehave when we read a pointer to a formatted_raw_ostream as-if it were an MCAssembler. =/ UBSan would catch this immediately. Many thanks to Matt for doing about 80% of the debugging work here in GDB, Jim for helping to explain how exactly to fix this, and others for putting up with the hair pulling that ensued during debugging it. llvm-svn: 174118
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Chandler Carruth authored
isa<> and dyn_cast<>. In several places, code is already hacking around the absence of this, and there seem to be several interfaces that might be lifted and/or devirtualized using this. This change was based on a discussion with Jim Grosbach about how best to handle testing for specific MCStreamer subclasses. He said that this was the correct end state, and everything else was too hacky so I decided to just make it so. No functionality should be changed here, this is just threading the kind through all the constructors and setting up the classof overloads. llvm-svn: 174113
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- Jan 31, 2013
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NAKAMURA Takumi authored
llvm-svn: 174106
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Tom Stellard authored
Patch by: Vincent Lejeune Reviewed-by:
Tom Stellard <thomas.stellard@amd.com> llvm-svn: 174099
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Tom Stellard authored
Patch by: Vincent Lejeune Reviewed-by:
Tom Stellard <thomas.stellard@amd.com> llvm-svn: 174098
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Tom Stellard authored
Patch by: Vincent Lejeune Reviewed-by:
Tom Stellard <thomas.stellard@amd.com> llvm-svn: 174097
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Chad Rosier authored
llvm-svn: 174094
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Tim Northover authored
llvm-svn: 174086
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Chad Rosier authored
Each target implementation was needlessly recomputing the index. Part of rdar://13076458 llvm-svn: 174083
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Tim Northover authored
This patch adds support for AArch64 (ARM's 64-bit architecture) to LLVM in the "experimental" category. Currently, it won't be built unless requested explicitly. This initial commit should have support for: + Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions (except the late addition CRC instructions). + CodeGen features required for C++03 and C99. + Compilation for the "small" memory model: code+static data < 4GB. + Absolute and position-independent code. + GNU-style (i.e. "__thread") TLS. + Debugging information. The principal omission, currently, is performance tuning. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174054
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Eric Christopher authored
llvm-svn: 174009
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Eric Christopher authored
register for inline asm. This conforms to how gcc allows for effective casting of inputs into gprs (fprs is already handled). llvm-svn: 174008
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Hal Finkel authored
On systems which support the QPX vector instructions, the stack must be 32-byte aligned. llvm-svn: 173993
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- Jan 30, 2013
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Evan Cheng authored
llvm-svn: 173987
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Hal Finkel authored
This should have gone in with r173973. llvm-svn: 173984
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Hal Finkel authored
This is the first commit of a large series which will add support for the QPX vector instruction set to the PowerPC backend. This instruction set is used on the IBM Blue Gene/Q supercomputers. llvm-svn: 173973
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Eli Bendersky authored
More details in this thread: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130128/163783.html Patch by JF Bastien llvm-svn: 173943
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Logan Chien authored
llvm-svn: 173941
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Logan Chien authored
llvm-svn: 173939
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David Blaikie authored
llvm-svn: 173888
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David Blaikie authored
llvm-svn: 173887
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Jack Carter authored
llvm-svn: 173886
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Jack Carter authored
setting of ELF header e_flags. Contributer: Jack Carter llvm-svn: 173885
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Jack Carter authored
setting of ELF header e_flags. Contributer: Jack Carter llvm-svn: 173884
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Jack Carter authored
and update ELF header e_flags. Currently gathering information such as symbol, section and data is done by collecting it in an MCAssembler object. From MCAssembler and MCAsmLayout objects ELFObjectWriter::WriteObject() forms and streams out the ELF object file. This patch just adds a few members to the MCAssember class to store and access the e_flag settings. It allows for runtime additions to the e_flag by assembler directives. The standalone assembler can get to MCAssembler from getParser().getStreamer().getAssembler(). This patch is the generic infrastructure and will be followed by patches for ARM and Mips for their target specific use. Contributer: Jack Carter llvm-svn: 173882
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Akira Hatanaka authored
Patch by Sasa Stankovic. llvm-svn: 173862
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Renato Golin authored
Changing ARMBaseTargetMachine to return ARMTargetLowering intead of the generic one (similar to x86 code). Tests showing which instructions were added to cast when necessary or cost zero when not. Downcast to 16 bits are not lowered in NEON, so costs are not there yet. llvm-svn: 173849
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- Jan 29, 2013
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Jyotsna Verma authored
llvm-svn: 173816
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Jyotsna Verma authored
llvm-svn: 173813
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Evan Cheng authored
llvm-svn: 173812
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NAKAMURA Takumi authored
llvm-svn: 173807
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Hans Wennborg authored
llvm-svn: 173798
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Tim Northover authored
The ARM and Thumb variants of LDREXD and STREXD have different constraints and take different operands. Previously the code expanding atomic operations didn't take this into account and asserted in Thumb mode. llvm-svn: 173780
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Craig Topper authored
llvm-svn: 173777
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Evan Cheng authored
conditions are met: 1. They share the same operand and are in the same BB. 2. Both outputs are used. 3. The target has a native instruction that maps to ISD::FSINCOS node or the target provides a sincos library call. Implemented the generic optimization in sdisel and enabled it for Mac OSX. Also added an additional optimization for x86_64 Mac OSX by using an alternative entry point __sincos_stret which returns the two results in xmm0 / xmm1. rdar://13087969 PR13204 llvm-svn: 173755
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Hal Finkel authored
This function will be used in future commits. llvm-svn: 173729
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- Jan 28, 2013
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Craig Topper authored
llvm-svn: 173674
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