Commits · 2d26fe7aa639e9aa84097bf5aadc83dd4a780e35 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Feb 19, 2016
- AMDGPU/SI: Fix s_waitcnt insertion for flat instructions · 2d26fe7a
  Tom Stellard authored Feb 19, 2016
  2d26fe7a
- [SystemZ] Fix ABI for i128 argument and return types · cfa1d2b4
  Ulrich Weigand authored Feb 19, 2016
  cfa1d2b4
- [X86] Remove unused entries from the disassembler type enum. · 5eeb41c1
  Craig Topper authored Feb 19, 2016
  5eeb41c1
- Minor code cleanups. NFC. · 1108ab05
  Junmo Park authored Feb 19, 2016
  1108ab05
- [x86] fix initialization of PredictableSelectIsExpensive · 0adbea4b
  Sanjay Patel authored Feb 18, 2016
  0adbea4b
Feb 18, 2016
- Remove uses of builtin comma operator. · 7a083814
  Richard Trieu authored Feb 18, 2016
  7a083814
- [PPCLoopDataPrefetch] Move pass to Transforms/Scalar/LoopDataPrefetch. NFC · 9d9cb274
  Adam Nemet authored Feb 18, 2016
  9d9cb274
- [PPCLoopDataPrefetch] Remove PPC from some of the names. NFC · 7cf9b1bf
  Adam Nemet authored Feb 18, 2016
  7cf9b1bf
- [WinEH] Hoist state stores from successors · a822c880
  David Majnemer authored Feb 18, 2016
  a822c880
- [X86ISelLowering] Use isPowerof2 instead of rewriting it. NFC. · 440a6761
  Davide Italiano authored Feb 18, 2016
  440a6761
- [AArch64] Reduce vector insert/extract cost for Kryo · 921ad01a
  Matthew Simpson authored Feb 18, 2016
  921ad01a
- Revert to extend i8/i16 return values on Darwin (PR26665) · 23cdc643
  Hans Wennborg authored Feb 18, 2016
  23cdc643
- [Hexagon] Remove redundant check. · c00ab4f2
  Chad Rosier authored Feb 18, 2016
  c00ab4f2
- AMDGPU/SI: add llvm.amdgcn.image.load/store[.mip] intrinsics · f2c64db5
  Nicolai Haehnle authored Feb 18, 2016
  f2c64db5
- [Hexagon] Fix compilation error with GCC 6 · 754bad88
  Krzysztof Parzyszek authored Feb 18, 2016
  754bad88
- [Hexagon] Implement TLS support · 7a737d1a
  Krzysztof Parzyszek authored Feb 18, 2016
  7a737d1a
- [mips][microMIPS] Implement TLBINV and TLBINVF instructions · f0340214
  Zlatko Buljan authored Feb 18, 2016
  f0340214
- [Hexagon] Add support for __builtin_prefetch · 6895b2ce
  Krzysztof Parzyszek authored Feb 18, 2016
  6895b2ce
- [Hexagon] Update the callee-saved register set for EH-aware functions · 39686cf9
  Krzysztof Parzyszek authored Feb 18, 2016
  39686cf9
- [X86][SSE] Improve PSHUFB shuffle mask decoding. · 05e48b95
  Simon Pilgrim authored Feb 18, 2016
  05e48b95
- Test commit access. · 10813a4e
  Nikolay Haustov authored Feb 18, 2016
  10813a4e
- [AVX512][PRORQ][PRORD] Change imm8 to int · 724dc3b2
  Michael Zuckerman authored Feb 18, 2016
  724dc3b2
- [WebAssembly] Don't use setRequiresStructuredCFG(true). · d85ab7fc
  Dan Gohman authored Feb 18, 2016
  d85ab7fc
- [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target · e1818af8
  Tom Stellard authored Feb 18, 2016
  e1818af8
- [WebAssembly] Disable register stackification and coloring when not optimizing · 71434ff6
  Derek Schuff authored Feb 17, 2016
  71434ff6
- AArch64: always clear kill flags up to last eliminated copy · 7687bcee
  Tim Northover authored Feb 17, 2016
  7687bcee
Feb 17, 2016
- Move LLVMCreateTargetData and LLVMDisposeTargetData together. NFC · 22d28783
  Amaury Sechet authored Feb 17, 2016
  22d28783
- AArch64: improve redundant copy elimination. · 3f228561
  Tim Northover authored Feb 17, 2016
  3f228561
- [Hexagon] Replacing reference/dereference with reference cast. · 5e552d14
  Colin LeMahieu authored Feb 17, 2016
  5e552d14
- Remove superfluous semicolon. · 32ac273a
  Nico Weber authored Feb 17, 2016
  32ac273a
- [WinEH] Optimize WinEH state stores · 7e5937b7
  David Majnemer authored Feb 17, 2016
  7e5937b7
- [Hexagon] Loop instructions don't need special processing. Extension and... · 3d3ff650
  Colin LeMahieu authored Feb 17, 2016
  3d3ff650
- [NVPTX] Annotate convergent intrinsics as convergent. · f9b5add6
  Justin Lebar authored Feb 17, 2016
  f9b5add6
- [NVPTX] Annotate call machine instructions as calls. · d596ec93
  Justin Lebar authored Feb 17, 2016
  d596ec93
- [Hexagon] Fold object construction into map::insert · de697d4d
  Krzysztof Parzyszek authored Feb 17, 2016
  de697d4d
- AVX512: Fix LowerMSCATTER() return value. · ac02f1bb
  Igor Breger authored Feb 17, 2016
  ac02f1bb
- [mips] Removed the SHF_ALLOC flag and the SHT_REL flag from the .pdr section. · 219fae9e
  Scott Egerton authored Feb 17, 2016
  219fae9e
- [X86][AVX] Support bit-blend integer shuffles for 256-bit integer vectors · c5b5dcb9
  Simon Pilgrim authored Feb 17, 2016
  c5b5dcb9
- [X86][AVX] Support bit-mask integer shuffles for 256-bit integer vectors · a50e8d36
  Simon Pilgrim authored Feb 17, 2016
  a50e8d36
- [X86][SSE] Tidyup BUILD_VECTOR operand collection. NFCI. · 9904924e
  Simon Pilgrim authored Feb 17, 2016
  9904924e