When a virtual register has a single value that is defined as a copy of a
reserved register, permit that copy to be joined. These virtual register are
usually copies of the stack pointer:

  %vreg75<def> = COPY %ESP; GR32:%vreg75
  MOV32mr %vreg75, 1, %noreg, 0, %noreg, %vreg74<kill>
  MOV32mi %vreg75, 1, %noreg, 8, %noreg, 0
  MOV32mi %vreg75<kill>, 1, %noreg, 4, %noreg, 0
  CALLpcrel32 ...

Coalescing these virtual registers early decreases register pressure.
Previously, they were coalesced by RALinScan::attemptTrivialCoalescing after
register allocation was completed.

The lower register pressure causes the mcinst-lowering-cmp0.ll test case to fail
because it depends on linear scan spilling a particular register.

I am deleting 2008-08-05-SpillerBug.ll because it is counting the number of
instructions emitted, and its revision history shows the 'correct' count being
edited many times.

llvm-svn: 128845

llvm-svn: 128844

rdar://problem/9225433

llvm-svn: 128841

llvm-svn: 128839

This causes defs to dominate uses, no instructions after terminators, and other
goodness.

llvm-svn: 128836

The code inserted by PPCTargetLowering::EmitInstrWithCustomInserter for ppc64 is
wrong, and I don't know how to fix it. It seems to be using the correct register
classes for pointers, but it inserts all 32-bit instructions.

llvm-svn: 128835

llvm-svn: 128834

  also fix the encoding of the later.
- Add a new encoding bit to describe the index mode used in AM3.
- Teach printAddrMode3Operand to check by the addressing mode which
  index mode to print.
- Testcases.

llvm-svn: 128832

llvm-svn: 128831

Move transformation of JmpLink and related nodes done during instruction selection to Legalize phase.

llvm-svn: 128830

llvm-svn: 128829

The 32-bit R0 cannot be used where a 64-bit register is expected.

llvm-svn: 128828

llvm-svn: 128827

llvm-svn: 128826

llvm-svn: 128823

Define most shift masks incrementally to reduce the redundant
hard-coding. Introduce new shift for the VEX flags to replace the
magic constant 32 in various places.

llvm-svn: 128822

llvm-svn: 128821

llvm-svn: 128820

llvm-svn: 128818

llvm-svn: 128812

returning a scalar value in a function whose return type is a single-
element structure or array.

llvm-svn: 128810

Contributed by: etherzhhb@gmail.com

llvm-svn: 128808

ref_cnt mutable and Retain/Release const to enable reference counted
pointers to const objects

llvm-svn: 128804

llvm-commits.  (Not sure why it only breaks on Windows; maybe it has
something to do with the iterator representation...)

llvm-svn: 128802

separate executable.

llvm-svn: 128801

llvm-svn: 128800

 - Adds support for sniffing PE/COFF files on win32 (.exe and .dll)
   which are COFF files that have an MS-DOS compatibility stub on
   the front of them.

 - Fixes a bug in the COFFObjectFile's support for the Microsoft COFF
   extension for long symbol names, wherein it was attempting to parse
   the leading '/' in an extended symbol name reference as part of the
   integer offset.

 - Fixes bugs in COFFObjectFile and ELFObjectFile wherein section
   and symbol iterators were being returned with uninitialized bytes;
   the type DataRefImpl is a union between 2 32-bit words (d.a and d.b)
   and a single intptr_t word (p). Only p was being initialized, so in
   32-bit builds the result would be iterators with random upper 32-bit
   words in their DataRefImpls. This caused random failures when
   seeking around in object files.

Patch by Graydon Hoare!

llvm-svn: 128799

Patch by Patrick Walton!

llvm-svn: 128798

Remove the LLVMContext& arguments from *Folder constructors, as they don't seem to be used anywhere.

llvm-svn: 128793

Patch by arrowdodger!

llvm-svn: 128789

after the given instruction; make sure to handle that case correctly.
(It's difficult to trigger; the included testcase involves a dead 
block, but I don't think that's a requirement.) 

While I'm here, get rid of the unnecessary warning about
SimplifyInstructionsInBlock, since it should work correctly as far as I know.

llvm-svn: 128782

Based on PR9429, but no testcase because I can't figure out how to trigger it
anymore given other changes to the relevant code.

llvm-svn: 128781

It's possible to craft an input that hits the recursion limits in a way
that SimplifyDemandedBits doesn't simplify the icmp but ComputeMaskedBits
can infer which bits are zero.

No test case as it depends on too many other things. Fixes PR9609.

llvm-svn: 128777

If someone first configure build with LLVM_ENABLE_FFI=1 and then turn it
off, the build will fail in lib/ExecutionEngine/Interpreter because
Interpreter will try still to #include <ffi/ffi.h>, but there are no
include_directories(${FFI_INCLUDE_DIR}) now.

This patch unset()'s HAVE_FFI_H and HAVE_FFI_FFI_H from cache file if
LLVM_ENABLE_FFI=0. This forces CMake to update config.h.

Patch by arrowdodger!

llvm-svn: 128769

llvm-svn: 128767

llvm-svn: 128765

When the greedy register allocator is splitting multiple global live ranges, it
tends to look at the same interference data many times. The InterferenceCache
class caches queries for unaltered LiveIntervalUnions.

llvm-svn: 128764

This is more compact and faster than using DenseMap.

llvm-svn: 128763

registers that arise from argument shuffling with the soft float ABI. These
instructions are particularly slow on Cortex A8. This fixes one half of
<rdar://problem/8674845>.

llvm-svn: 128759

transformations in target-specific DAG combines without causing DAGCombiner to
delete the same node twice. If you know of a better way to avoid this (see my
next patch for an example), please let me know.

llvm-svn: 128758