llvm-svn: 22315

tracking the instructions causing loads and stores provides more information than just the pointer being loaded or stored

llvm-svn: 22311

See last commit for LangRef, this implements it on all targets.

llvm-svn: 22273

llvm-svn: 22254

llvm-svn: 22026

llvm-svn: 22015

llvm-svn: 22004

llvm-svn: 21993

llvm-svn: 21958

llvm-svn: 21931

llvm-svn: 21930

llvm-svn: 21900

llvm-svn: 21870

llvm-svn: 21833

llvm-svn: 21825

being stored/loaded through!

llvm-svn: 21806

llvm-svn: 21804

Lower debug info to noops.

llvm-svn: 21698

population (ctpop).  Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.

More coming soon.

llvm-svn: 21676

was contributed by Morten Ofstad, with some minor tweaks and bug fixes added
by me.

llvm-svn: 21636

Implement Value* tracking for loads and stores in the selection DAG.  This enables one to use alias analysis in the backends.

(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*.  Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.

llvm-svn: 21599

llvm-svn: 21439

llvm-svn: 21420

Make llvm undef values generate ISD::UNDEF nodes

llvm-svn: 21261

llvm-svn: 21167

llvm-svn: 21014

llvm-svn: 21011

llvm-svn: 20965

them up after the code has been emitted.  This allows targets to select one
mbb as multiple mbb's as needed.

llvm-svn: 20937

returned integer values all of the way to 64-bits (we only did it to 32-bits
leaving the top bits undefined).  This causes problems for targets like alpha
whose ABI's define the top bits too.

llvm-svn: 20926

llvm-svn: 20842

using Function::arg_{iterator|begin|end}.  Likewise Module::g* -> Module::global_*.

This patch is contributed by Gabor Greif, thanks!

llvm-svn: 20597

llvm-svn: 20231

Don't sink argument loads into loops or other bad places.  This disables folding of argument loads with instructions that are not in the entry block.

llvm-svn: 20228

llvm-svn: 19779

llvm-svn: 19763

llvm-svn: 19707

do it.  This results in better code on X86 for floats (because if strict
precision is not required, we can elide some more expensive double -> float
conversions like the old isel did), and allows other targets to emit
CopyFromRegs that are not legal for arguments.

llvm-svn: 19668

llvm-svn: 19656

X86/reg-pressure.ll again, and allows us to do nice things in other cases.
For example, we now codegen this sort of thing:

int %loadload(int *%X, int* %Y) {
  %Z = load int* %Y
  %Y = load int* %X      ;; load between %Z and store
  %Q = add int %Z, 1
  store int %Q, int* %Y
  ret int %Y
}

Into this:

loadload:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%EAX]
        mov %ECX, DWORD PTR [%ESP + 8]
        inc DWORD PTR [%ECX]
        ret

where we weren't able to form the 'inc [mem]' before.  This also lets the
instruction selector emit loads in any order it wants to, which can be good
for register pressure as well.

llvm-svn: 19644