llvm-svn: 170158

llvm-svn: 165402

llvm-svn: 162186

llvm-svn: 160632

llvm-svn: 160631

llvm-svn: 159082

llvm-svn: 154588

llvm-svn: 153574

llvm-svn: 153543

llvm-svn: 153542

llvm-svn: 139263

Don't emit a bit test if there is only one case the test can yield false. A simple SETNE is sufficient.

llvm-svn: 135126

The backend already knew this trick.

llvm-svn: 132915

llvm-svn: 131916

llvm-svn: 131863

llvm-svn: 131841

when X has multiple uses.  This is useful for exposing secondary optimizations,
but the X86 backend isn't ready for this when X has a single use.  For example,
this can disable load folding.

This is inching towards resolving PR6627.

llvm-svn: 130238

llvm-svn: 130137

On x86 this allows to fold a load into the cmp, greatly reducing register pressure.
  movzbl	(%rdi), %eax
  cmpl	$47, %eax
->
  cmpb	$47, (%rdi)

This shaves 8k off gcc.o on i386. I'll leave applying the patch in README.txt to Chris :)

llvm-svn: 130005

improvements, that will lead to fixing PR6627.

llvm-svn: 129504

llvm-svn: 128286

llvm-svn: 128107

llvm-svn: 127982

llvm-svn: 126719

Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize legalized code for large integer arithmetic.

1. Inform users of ADDEs with two 0 operands that it never sets carry
2. Fold other ADDs or ADDCs into the ADDE if possible

It would be neat if we could do the same thing for SETCC+ADD eventually, but we can't do that in target independent code.

llvm-svn: 126557

llvm-svn: 126103

llvm-svn: 126101

llvm-svn: 125738

llvm-svn: 125702

llvm-svn: 125681

llvm-svn: 125660

llvm-svn: 125659

llvm-svn: 125658

llvm-svn: 124989

This makes the job of the later optzn passes easier, allowing the vast amount of
icmp transforms to chew on it.

We transform 840 switches in gcc.c, leading to a 16k byte shrink of the resulting
binary on i386-linux.

The testcase from README.txt now compiles into
  decl  %edi
  cmpl  $3, %edi
  sbbl  %eax, %eax
  andl  $1, %eax
  ret

llvm-svn: 124724

llvm-svn: 124599

Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, c1+c2) when c1 equals the amount of bits that are truncated off.

This happens all the time when a smul is promoted to a larger type.

On x86-64 we now compile "int test(int x) { return x/10; }" into
  movslq  %edi, %rax
  imulq $1717986919, %rax, %rax
  movq  %rax, %rcx
  shrq  $63, %rcx
  sarq  $34, %rax <- used to be "shrq $32, %rax; sarl $2, %eax"
  addl  %ecx, %eax

This fires 96 times in gcc.c on x86-64.

llvm-svn: 124559

llvm-svn: 124097

define i32 @foo(i32 %x) nounwind readnone ssp {
entry:
  %tobool = icmp eq i32 %x, 0
  %tmp5 = select i1 %tobool, i32 2, i32 1
  ret i32 %tmp5
}

llvm-svn: 124091

llvm-svn: 124082