- Jun 12, 2011
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Rafael Espindola authored
Add a triple to the tests. llvm-svn: 132885
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Rafael Espindola authored
llvm-svn: 132883
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Rafael Espindola authored
we try to branch to them. Before we were creating successor lists with duplicated entries. Fixing that found a bug in isBlockOnlyReachableByFallthrough that would causes it to return the wrong answer for ----------- ... jne foo jmp bar foo: ---------- llvm-svn: 132882
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Charles Davis authored
functionality change. Later on, we'll use the flag to emit SEH pseudo-ops that describe how the call frame was built. llvm-svn: 132880
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- Jun 11, 2011
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Chad Rosier authored
llvm-svn: 132872
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Chad Rosier authored
llvm-svn: 132871
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Eli Friedman authored
memcpy/memset symbol doesn't get marked up correctly in PIC modes otherwise. Should fix llvm-x86_64-linux-checks buildbot. Followup to r132864. llvm-svn: 132869
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Andrew Trick authored
Patch by: Jakub Staszak! Introduces BranchProbability. Changes unsigned to uint32_t all over and uint64_t only when overflow is expected. llvm-svn: 132867
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Eli Friedman authored
rdar://9431466 llvm-svn: 132864
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Eric Christopher authored
llvm-svn: 132863
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Dan Gohman authored
default, since it usually has very few elements. This speeds up alias queries in many cases, because AliasCache.clear() doesn't have to visit as many buckets. llvm-svn: 132862
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- Jun 10, 2011
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Rafael Espindola authored
llvm-svn: 132857
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Cameron Zwarich authored
CallOrPrologue correctly and eliminate the existing setter. llvm-svn: 132856
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Cameron Zwarich authored
comment on their meaning. llvm-svn: 132854
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Cameron Zwarich authored
llvm-svn: 132853
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Cameron Zwarich authored
llvm-svn: 132852
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Rafael Espindola authored
Thanks Bob Wilson for noticing it! llvm-svn: 132851
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Eli Friedman authored
PR10092 (second try): Don't crash on a load without a momoperand; fast-isel creates loads like this. llvm-svn: 132826
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Chad Rosier authored
and definitions when emitting global variables. This was causing global declarations to be emitted as if they were definitions. Fixes <rdar://problem/9429892>. llvm-svn: 132825
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Rafael Espindola authored
llvm-svn: 132822
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Rafael Espindola authored
llvm-svn: 132821
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Rafael Espindola authored
With this I am able to bootstrap clang with early tail duplication enabled for any small bb and setting tail-dup-size to a relatively large value(8) to stress this code. llvm-svn: 132816
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Eli Friedman authored
Chris fixed this README a while back by changing how clang generates code for structs like the given struct. llvm-svn: 132815
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Rafael Espindola authored
llvm-svn: 132814
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Cameron Zwarich authored
causing an assertion failure downstream. This fixes <rdar://problem/9562908>. This really seems like it should always be set at CCState creation time, so mistakes like this can never happen. I'll take a look at doing that. llvm-svn: 132811
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Eli Friedman authored
Change this DAGCombine to build AND of SHR instead of SHR of AND; this matches the ordering we prefer in instcombine. Part of rdar://9562809. The potential DAGCombine which enforces this more generally messes up some other very fragile patterns, so I'm leaving that alone, at least for now. llvm-svn: 132809
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- Jun 09, 2011
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Rafael Espindola authored
eh edges. Swap the order of the checks to avoid it. llvm-svn: 132806
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Rafael Espindola authored
llvm-svn: 132805
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John McCall authored
llvm-svn: 132803
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Roman Divacky authored
VK_PPC_{HA,LO}16 into darwin and gas variants. Darwin wants {ha,lo}16(symbol) while gnu as wants symbol@{ha,l}. llvm-svn: 132802
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John McCall authored
pad, separating the exception and selector calls from the new lpad. Teaching it not to do that, or to properly adjust the CFG afterwards, is out of scope because it would require the other edges to the landing pad to be split as well (effectively). Instead, just recover from the most likely cases during inlining. The best long-term solution is to change the exception representation and commit to either requiring or not requiring the more complex edge-splitting logic; this is just a shorter-term hack. llvm-svn: 132799
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Rafael Espindola authored
No functionality change. llvm-svn: 132798
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John McCall authored
llvm-svn: 132797
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Eli Friedman authored
llvm-svn: 132795
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Jason W Kim authored
llvm-svn: 132790
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Eli Friedman authored
Add a check to make sure we don't crash with strange configurations where we do fast-isel, then try to fold instructions. PR10092. llvm-svn: 132789
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Jakob Stoklund Olesen authored
The register allocators automatically filter out reserved registers and place the callee saved registers last in the allocation order, so custom methods are no longer necessary just for that. Some targets still use custom allocation orders: ARM/Thumb: The high registers are removed from GPR in thumb mode. The NEON allocation orders prefer to use non-VFP2 registers first. X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble. SystemZ: Some of the allocation orders are omitting R12 aliases without explanation. I don't understand this target well enough to fix that. It looks like all the boilerplate could be removed by reserving the right registers. llvm-svn: 132781
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Eric Christopher authored
llvm-svn: 132777
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Eric Christopher authored
llvm-svn: 132776
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Rafael Espindola authored
llvm-svn: 132775
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