LocalRewriter.

This is a bit of a hack that adds an implicit use operand to model the
read-modify-write nature of a partial redef. Uses and defs are rewritten in
separate passes, and a single operand would never be processed twice.

<rdar://problem/8518892>

llvm-svn: 116210

llvm-svn: 116209

llvm-svn: 116201

llvm-svn: 116198

llvm-svn: 116197

llvm-svn: 116196

llvm-svn: 116195

llvm-svn: 116194

llvm-svn: 116192

it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.

llvm-svn: 116190

llvm-svn: 116188

llvm-svn: 116177

llvm-svn: 116174

llvm-svn: 116173

llvm-svn: 116170

truncate the stack pointer to 32-bits on a 64-bit machine.

llvm-svn: 116169

alignment for PPC32/64, avoiding some masking operations.

llvm-gcc expands vaarg inline instead of using the instruction
so it has never hit this.

llvm-svn: 116168

llvm-svn: 116167

Now using a variant of the existing inlining heuristics to decide whether to create a given specialization of a function in PartialSpecialization.  If the total performance bonus across all callsites passing the same constant exceeds the specialization cost, we create the specialization.

llvm-svn: 116158

llvm-svn: 116157

llvm-svn: 116156

llvm-svn: 116155

llvm-svn: 116154

llvm-svn: 116152

llvm-svn: 116151

llvm-svn: 116150

llvm-svn: 116149

llvm-svn: 116148

llvm-svn: 116146

llvm-svn: 116143

llvm-svn: 116142

llvm-svn: 116140

llvm-svn: 116136

llvm-svn: 116135

1. Cortex-A8 load / store multiplies can only issue on ALU0.
2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues.
3. Correctly model all vld1 and vld2 variants.

llvm-svn: 116134

llvm-svn: 116130

before decrementing. <rdar://problem/8529919>

llvm-svn: 116126

the add/or xform.  The JIT isn't mcized yet, boo.

This fixes Olden/voronoi, bh and a ton of other stuff that
uses the jit.

llvm-svn: 116125

llvm-svn: 116124

llvm-svn: 116123