- Aug 08, 2009
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Chris Lattner authored
now that they create *all* the sections. llvm-svn: 78494
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Eric Christopher authored
llvm-svn: 78493
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Chris Lattner authored
much more efficient way than a sequence of if's. Switch MatchRegisterName to use it. It would be nice if someone could factor this out to a shared place in tblgen :) llvm-svn: 78492
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Anders Carlsson authored
llvm-svn: 78491
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Fariborz Jahanian authored
llvm-svn: 78489
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Ryan Flynn authored
llvm-svn: 78488
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Chris Lattner authored
llvm-svn: 78487
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Chris Lattner authored
llvm-svn: 78486
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Daniel Dunbar authored
- Part of optimal static profiling patch sequence by Andreas Neustifter. llvm-svn: 78485
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Daniel Dunbar authored
- Part of optimal static profiling patch sequence by Andreas Neustifter. llvm-svn: 78484
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Anders Carlsson authored
Introduce a new PragmaPack attribute, and use it for #pragma pack. The PackedAttr now only represents __attribute__((packed)). This is necessary because #pragma pack and __attribute__((packed)) have different semantics. No functionality change yet, but this lays the groundwork for fixing a record layout bug. llvm-svn: 78483
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Eric Christopher authored
llvm-svn: 78482
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Anders Carlsson authored
llvm-svn: 78481
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Anders Carlsson authored
getFunctionLevelDeclContext needs to get the previous DeclContext if EnterDeclaratorContext has been called. Fixes PR4694. (Doug, please review) llvm-svn: 78480
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Bruno Cardoso Lopes authored
since they are in 64 bit mode with i64immSExt32 imms. JIT is not affected since it handles both word absolute relocations in the same way llvm-svn: 78479
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Anders Carlsson authored
llvm-svn: 78478
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Daniel Dunbar authored
- Part of optimal static profiling patch sequence by Andreas Neustifter. - Store edge, block, and function information separately for each functions (instead of in one giant map). - Return frequencies as double instead of int, and use a sentinel value for missing information. llvm-svn: 78477
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Bruno Cardoso Lopes authored
Handle large integers, x86_fp80, ConstantAggregateZero, and two more ConstantExpr: GetElementPtr and IntToPtr Set SHF_MERGE bit for mergeable strings Avoid zero initialized strings to be classified as a bss symbol Don't allow common symbols to be classified as STB_WEAK Add a constant to be used as a global value offset in data relocations llvm-svn: 78476
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Daniel Dunbar authored
llvm-svn: 78475
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Anders Carlsson authored
llvm-svn: 78474
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Daniel Dunbar authored
the new havior is better so... llvm-svn: 78473
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Jakob Stoklund Olesen authored
Also don't dereference old pointers after they have been deleted causing random crashes when enabling the machine code verifier. Ahem... I have not included a test case for the crash. It hapened when enabling the verifier on CodeGen/X86/2009-08-06-branchfolder-crash.ll. The crash depends on an MBB being allocated at the same address as a previously deleted MBB. I don't think that can be reproduced reliably. llvm-svn: 78472
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Edward O'Callaghan authored
llvm-svn: 78471
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Anton Korobeynikov authored
Did anyone tests v4f32 ever? llvm-svn: 78470
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Anton Korobeynikov authored
llvm-svn: 78469
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Anton Korobeynikov authored
llvm-svn: 78468
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Jakob Stoklund Olesen authored
* Cleaner handling of <undef>. * <def> takes precedence over <def,dead>. * Implement the OK-to-redefine-a-register-that-was- live-in-but-has-not-been-used-before rule. llvm-svn: 78467
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Jakob Stoklund Olesen authored
Now there is no special treatment of instructions that redefine part of a super-register. Instead, the super-register is marked with <imp-use,kill> and <imp-def>. For instance, from LowerSubregs on ARM: subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1<undef>, %D1<kill>, 5 subreg: %D2<def> = FCPYD %D1<kill>, 14, %reg0, %Q1<imp-def> subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1, %D0<kill>, 6 subreg: %D3<def> = FCPYD %D0<kill>, 14, %reg0, %Q1<imp-use,kill>, %Q1<imp-def> llvm-svn: 78466
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Jakob Stoklund Olesen authored
Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. llvm-svn: 78465
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Andrew Lenharth authored
llvm-svn: 78464
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Benjamin Kramer authored
llvm-svn: 78463
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Benjamin Kramer authored
llvm-svn: 78462
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Daniel Dunbar authored
- This doesn't actually improve the algorithm (its still linear), but the generated (match) code is now fairly compact and table driven. Still need a generic string matcher. - The table still needs to be compressed, this is quite simple to do and should shrink it to under 16k. - This also simplifies and restructures the code to make the match classes more explicit, in anticipation of resolving ambiguities. llvm-svn: 78461
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Bob Wilson authored
so I generalized the class for VTRN in the .td file to handle all 3 of them. llvm-svn: 78460
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Bob Wilson authored
directly from the intrinsics produced by the frontend. If it is more convenient to have a custom DAG node for using these to implement shuffles, we can add that later. llvm-svn: 78459
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Daniel Dunbar authored
so that terminal states are as simple as possible. - If we were willing to assume that the order that operands get inserted in the MCInst is fixed we could actually dispose with this altogether, although it might be nice to have the flexibility to change it later. llvm-svn: 78458
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Edward O'Callaghan authored
llvm-svn: 78457
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Evan Cheng authored
llvm-svn: 78456
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Evan Cheng authored
llvm-svn: 78455
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