llvm-svn: 107807

a separate DCE pass over MachineInstrs.

llvm-svn: 107804

a bunch of stuff, to allow the target-independent calling convention
logic to be employed.

llvm-svn: 107800

position when emitting multiple blocks when executing a custom
inserter.

llvm-svn: 107797

llvm-svn: 107796

llvm-svn: 107795

around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.

llvm-svn: 107791

instance, rather than pointers to all of FunctionLoweringInfo's
members.

This eliminates an NDEBUG ABI sensitivity.

llvm-svn: 107789

allow target-specific fast-isel code to make use of it directly.

llvm-svn: 107787

code can do calling-convention queries. This obviates OutputArgReg.

llvm-svn: 107786

llvm-svn: 107781

llvm-svn: 107780

llvm-svn: 107778

Buildbot breakage.

llvm-svn: 107744

than assuming a target will custom lower them. Targets which do so should
exlicitly mark them as having custom lowerings. PR7454.

llvm-svn: 107734

llvm-svn: 107732

INSERT_SUBREG will now only appear in SSA machine instructions.

Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant
since partial redef COPY instructions appear.

llvm-svn: 107726

SelectBasicBlock doesn't needs its BasicBlock argument.

llvm-svn: 107712

llvm-svn: 107710

llvm-svn: 107700

llvm-svn: 107698

It is OK for an alias live range to overlap if there is a copy to or from the
physical register. CoalescerPair can work out if the copy is coalescable
independently of the alias.

This means that we can join with the actual destination interval instead of
using the getOrigDstReg() hack. It is no longer necessary to merge clobber
ranges into subregisters.

llvm-svn: 107695

the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.

llvm-svn: 107691

llvm-svn: 107684

llvm-svn: 107670

llvm-svn: 107668

which do not depend on SelectionDAG.

llvm-svn: 107666

Fix a major regression on COFF targets introduced by r103267: 'discardable' section means that it is used only during the program load and can be discarded afterwards.
This way *only* debug sections can be discarded, but not the opposite. Seems like the copy-and-pasto from ELF code, since there it contains the reverse flag ('alloc').

llvm-svn: 107658

the pseudo instruction is not at the end of the block.

llvm-svn: 107655

registers.  Split out testcases per architecture and os
now.

Patch from Nelson Elhage.

llvm-svn: 107640

llvm-svn: 107615

llvm-svn: 107612

llvm-svn: 107602

Infer alignments of fixed frame objects when they are constructed. This ensures remat'ed loads from fixed slots have the right alignments.

llvm-svn: 107591

llvm-svn: 107581

llvm-svn: 107556

Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.

llvm-svn: 107550

This code is transitional, it will soon be possible to eliminate
isExtractSubreg, isInsertSubreg, and isMoveInstr in most places.

llvm-svn: 107547

llvm-svn: 107537

The COPY instruction is intended to replace the target specific copy
instructions for virtual registers as well as the EXTRACT_SUBREG and
INSERT_SUBREG instructions in MachineFunctions. It won't we used in a selection
DAG.

COPY is lowered to native register copies by LowerSubregs.

llvm-svn: 107529