Commits · 307e039d8c981eb3d3dc474dff3f334b50563464 · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Sep 18, 2017
- [AArch64] Adjust the cost model for Exynos M1 and M2 · 307e039d
  Evandro Menezes authored Sep 18, 2017
  307e039d
- [AArch64] Adjust the cost model for Exynos M1 and M2 · 91650ef0
  Evandro Menezes authored Sep 18, 2017
  91650ef0
- [AArch64] Adjust the cost model for Exynos M1 and M2 · 9cd1bd7a
  Evandro Menezes authored Sep 18, 2017
  9cd1bd7a
- [GlobalISel] Only build expensive remarks if they're enabled. NFC. · d630a92b
  Ahmed Bougacha authored Sep 18, 2017
  d630a92b
- [X86][AVX] Improve (i8 bitcast (v8i1 x)) handling for 256-bit vector compare results. · 4aa28b97
  Simon Pilgrim authored Sep 18, 2017
  4aa28b97
- [SelectionDAG] Add BITCAST handling to ComputeNumSignBits for splatted sign bits. · 0b21ef1f
  Simon Pilgrim authored Sep 18, 2017
  0b21ef1f
- [X86] Fix two more places to prefer VPERMQ/PD over VPERM2X128 when AVX2 is enabled · 77d7f331
  Craig Topper authored Sep 18, 2017
  77d7f331
- [SLP] clean up for vector store case; NFCI · 55de1ed8
  Sanjay Patel authored Sep 18, 2017
  55de1ed8
- [AArch64] Add V8_2aOps feature to Cortex-A55 and 75 · 3fa0ccff
  Sam Parker authored Sep 18, 2017
  3fa0ccff
- [ARM] Implement isTruncateFree · 71efbe4c
  Sam Parker authored Sep 18, 2017
  71efbe4c
- [X86][SSE] Improve support for vselect(Cond, 0, X) -> ANDN(Cond, X) · 00161c99
  Simon Pilgrim authored Sep 18, 2017
  00161c99
- [ARM] Fix for indexed dot product instruction descriptions · 4e6df159
  Sjoerd Meijer authored Sep 18, 2017
  4e6df159
- [dwarfdump] Make .eh_frame an alias for .debug_frame · c0a758d8
  Jonas Devlieghere authored Sep 18, 2017
  c0a758d8
- [X86] combineVSelectWithAllOnesOrZeros - cleanup variable names. NFCI. · f133c50a
  Simon Pilgrim authored Sep 18, 2017
  f133c50a
- [X86FixupBWInsts] More precise register liveness if no <imp-use> on MOVs. · 84af99b3
  Nikolai Bozhenov authored Sep 18, 2017
  84af99b3
- [XRay][tools] Support tail-call exits before we write them in the runtime · 0f84a7d3
  Dean Michael Berris authored Sep 18, 2017
  0f84a7d3
- [X86] Strengthen some of the SD type constraints in X86InstrFragmentsSIMD.td · fc52eb37
  Craig Topper authored Sep 18, 2017
  fc52eb37
- [X86] Teach the execution domain fixing tables to use movlhps inplace of... · a6054328
  Craig Topper authored Sep 18, 2017
  a6054328
- [X86] Teach execution domain fixing to convert between FP and int unpack instructions. · 87f7381e
  Craig Topper authored Sep 18, 2017
  87f7381e
- [X86] Teach execution domain fixing to convert between VPERMILPS and VPSHUFD. · d4341920
  Craig Topper authored Sep 18, 2017
  d4341920
- [X86] Remove the X86ISD::MOVLHPD. Lowering doesn't use it and it's not a real instruction. · 3b11fca7
  Craig Topper authored Sep 18, 2017
  3b11fca7
- [X86] Teach shuffle lowering to use MOVLHPS/MOVHLPS for lowering v4f32 unary... · ee6646d7
  Craig Topper authored Sep 17, 2017
  ee6646d7
Sep 17, 2017
- [X86] Synchronize a pattern between SSE1 and AVX/AVX512. · 0a197df6
  Craig Topper authored Sep 17, 2017
  0a197df6
- [X86] Colocate all of the X86VBroadcast patterns for v2i64 and v2f64. NFC · 9689fc6d
  Craig Topper authored Sep 17, 2017
  9689fc6d
- [X86] Remove patterns for X86Movddup with v4i64 type. Lowering doesn't emit these. · 9c0bf2c7
  Craig Topper authored Sep 17, 2017
  9c0bf2c7
- [X86] Remove isel patterns for X86Movhlps and X86Movlhps with integer types.... · 5831e2c8
  Craig Topper authored Sep 17, 2017
  5831e2c8
- [X86] Remove isel patterns for movlpd/movlps with integer types. Lowering doesn't emit these. · e305c5ab
  Craig Topper authored Sep 17, 2017
  e305c5ab
- Revert "[ThinLTO] Avoid archive member collisions with old API" · dcebe4fc
  Johan Engelen authored Sep 17, 2017
  dcebe4fc
- [ThinLTO] Avoid archive member collisions with old API · d3a82712
  Johan Engelen authored Sep 17, 2017
  d3a82712
- [RISCV] Add support for disassembly · 8ab4a969
  Alex Bradbury authored Sep 17, 2017
  8ab4a969
- [RISCV] Add support for all RV32I instructions · 6758ecb9
  Alex Bradbury authored Sep 17, 2017
  6758ecb9
- [GlobalISel][X86] refactoring X86InstructionSelector.cpp .NFC. · 06335bbd
  Igor Breger authored Sep 17, 2017
  06335bbd
- [GlobalISel][X86] Legalize i1 G_ADD/G_SUB/G_MUL/G_XOR/G_OR/G_AND instructions. · f1d388a5
  Igor Breger authored Sep 17, 2017
  f1d388a5
- [GlobalISel][X86] G_FCONSTANT support. · 21200ed7
  Igor Breger authored Sep 17, 2017
  21200ed7
- [X86] Remove integer X86ISD::SHUFP patterns. Lowering doesn't emit these. · bef5d244
  Craig Topper authored Sep 17, 2017
  bef5d244
- [X86] Add patterns to make blends with immediate control commutable during isel for load folding. · 7c0de010
  Craig Topper authored Sep 17, 2017
  7c0de010
- [X86] Remove some unused defaults from some multiclass parameters. · e09907fc
  Craig Topper authored Sep 17, 2017
  e09907fc
- [ORC] Hook up the LLVMOrcAddObjectFile function in the Orc C Bindings. · ec30063f
  Lang Hames authored Sep 17, 2017
  ec30063f
- [X86] Make PLCMULQDQ instructions commutable during isel to fold loads. · ca05e9fd
  Craig Topper authored Sep 16, 2017
  ca05e9fd
- [X86] Add NoAVX predicates to the patterns for the legacy encoded PCLMUL and AES instructions. · ffca0ff9
  Craig Topper authored Sep 16, 2017
  ffca0ff9