llvm-svn: 56697

values for overflow.

llvm-svn: 56686

Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.

llvm-svn: 56683

its size).  Adjust various lowering functions to
pass this info through from CallInst.  Use it to
implement sseregparm returns on X86.  Remove
X86_ssecall calling convention.

llvm-svn: 56677

require RIP-relative addressing and use it to fix a bug
in X86FastISel in x86-64 PIC mode, where it was trying to
use base/index registers with RIP-relative addresses. This
fixes a bunch of x86-64 testsuite failures.

llvm-svn: 56676

llvm-svn: 56675

llvm-svn: 56665

llvm-svn: 56641

require more work.

llvm-svn: 56637

information is in an unreachable block, then it's possible that the high/low pc
values won't be set for the dwarf information. E.g., this function:

void abort(void) __attribute__((__noreturn__));
void dead_beef(void) __attribute__ ((noreturn));

int *b;

void dead_beef(void) {
  *b=0xdeadbeef;
  abort();
}

has a call to "@llvm.dbg.region.end" only in the unreachable block:

define void @dead_beef() noreturn nounwind  {
entry:
	call void @llvm.dbg.func.start(...)
	call void @llvm.dbg.stoppoint(...)
...
	call void @abort( ) noreturn nounwind 
	unreachable

return:		; No predecessors!
	call void @llvm.dbg.stoppoint(...)
	call void @llvm.dbg.region.end(...)
	ret void
}

The dwarf information emitted is something like:

0x00000084:     TAG_subprogram [5]  
                 AT_name( "dead_beef" )
                 AT_external( 0x01 )
                 AT_prototyped( 0x01 )
                 AT_decl_file( 0x01 )
                 AT_decl_line( 0x08 )

Note that this is *not* the best fix for this problem, but a band-aid for an
gaping wound. This code needs to be changed when we revamp our debugging
information.

llvm-svn: 56628

llvm-svn: 56627

load from the stub, instead of the result of the load from the stub.

llvm-svn: 56626

s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage 
- to implement function notes as function attributes and 
- to distinguish between function attributes and return value attributes.

This requires corresponding changes in llvm-gcc and clang.

llvm-svn: 56622

llvm-svn: 56621

With sse3 and when the source is a load or has multiple uses, favors movddup over shuffp*, pshufd, etc. Without sse3 or when the source is from a register, make use of movlhps

llvm-svn: 56620

meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0).  Update documentation
to reflect reality.

llvm-svn: 56619

llvm-svn: 56608

llvm-svn: 56607

llvm-svn: 56600

Fix patterns for SSE4.1 move and sign extend instructions. Also add instructions which fold VZEXT_MOVL and VZEXT_LOAD.

llvm-svn: 56594

llvm-svn: 56593

llvm-svn: 56588

llvm-svn: 56585

llvm-svn: 56582

llvm-svn: 56580

llvm-svn: 56575

llvm-svn: 56574

llvm-svn: 56573

llvm-svn: 56572

llvm-svn: 56568

llvm-svn: 56527

Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.

llvm-svn: 56526

Do not check isDeclaration() in hasNote(). It is clients' responsibility.

llvm-svn: 56524

Function Notes also. Function notes are stored at index ~0.

llvm-svn: 56511

object. This will be needed to support debug info.

llvm-svn: 56508

instruction opcodes are now numbered. No functionality change.

llvm-svn: 56497

llvm-svn: 56495

X86ISelDAGToDAG.cpp and into X86InstrInfo.cpp. This will allow
it to be reused by FastISel.

llvm-svn: 56494

llvm-svn: 56483

llvm-svn: 56477